tmp89ch42 TOSHIBA Semiconductor CORPORATION, tmp89ch42 Datasheet - Page 30
tmp89ch42
Manufacturer Part Number
tmp89ch42
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89CH42.pdf
(342 pages)
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2.3
System clock controller
RB000
2.3.3
Warm-up counter data register
Clock gear control register
(0x0FCE)
(0x0FCF)
WUCDR
CGCR
2.3.3.1
Note 4: Before starting the warm-up counter operation, set the source clock and the frequency division rate at WUCCR and set
Note 1: Don't start the warm-up counter operation with WUCDR set at "0x00".
Note 1: fcgck: Gear clock [Hz], fc: High-frequency clock [Hz]
Note 2: Don't change CGCR<FCGCKSEL> in the SLOW mode.
Note 3: Bits 7 to 2 of CGCR are read as "0".
Functions
peripheral circuits.
clock.
of I/O Ports.
P0FC0 to "1" and then set SYSCR2<XEN> to "1".
P0FC2 to "1" and then set SYSCR2<XTEN> to "1".
oscillator between the XIN and XOUT pins and between the XTIN and XTOUT pins respectively.
XTIN pins and the XOUT/XTOUT pins are kept open.
FCGCKSEL
WUCDR
Read/Write
Read/Write
Bit Symbol
Bit Symbol
the warm-up time at WUCDR.
After reset
After reset
The clock generator generates the basic clock for the system clocks to be supplied to the CPU core and
It contains two oscillation circuits: one for the high-frequency clock and the other for the low-frequency
The oscillation circuit pins are also used as ports P0. For the setting to use them as ports, refer to the chapter
To use ports P00 and P01 as the high-frequency clock oscillation circuits (the XIN and XOUT pins), set
To use ports P02 and P03 as the low-frequency clock oscillation circuits (the XTIN and XTOUT pins), set
The high-frequency (fc) clock and the low-frequency (fs) clock can easily be obtained by connecting an
Clock input from an external oscillator is also possible. In this case, external clocks are applied to the XIN/
Clock generator
Clock gear setting
R
7
0
7
0
-
R
6
1
6
0
-
R
5
1
5
0
00 :
01 :
10 :
11 :
-
Page 16
fcgck = fc / 4
fcgck = fc / 2
fcgck = fc
Reserved
Warm-up time setting
R
4
0
4
0
-
WUCDR
R/W
R
3
0
3
0
-
R
0
2
1
2
-
1
1
1
0
FCGCKSEL
TMP89CH42
R/W
0
0
0
0
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