W83791SD Information Storage Devices, Inc, W83791SD Datasheet
W83791SD
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W83791SD Summary of contents
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... W83791SD/ W83791SG WINBOND H/W MONITORING Publication Release Date: January 18, 2005 Revision 1.1 ...
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... These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales. W83791SD/W83791SG VERSION ON WEB n.a. ...
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... Speech Flash Memory Read Data Registers Index A4h-A5h (Bank 0) ................... 11 7.17 Flash Page count Index A7h (Bank 0) ..................................................................... 11 8. ELECTRICAL CHARACTERISTICS......................................................................................... 11 8.1 Absolute Maximum Ratings .......................................................................................... 11 8.2 DC Characteristics ........................................................................................................ 11 8.3 AC Characteristics ........................................................................................................ 13 8.3.1 Serial Bus Timing Diagram.............................................................................................13 9. HOW TO READ THE TOP MARKING...................................................................................... 14 10. PACKAGE SPECIFICATION .................................................................................................... 15 11. APPLICATION CIRCUITS ........................................................................................................ 16 W83791SD/W83791SG Publication Release Date: January 18, 2005 - III - Revision 1.1 ...
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... GENERAL DESCRIPTION W83791SD/ programmable speech synthesizer with 9-bit current DAC output that can connect to speaker or LINE_OUT by the AC’97 audio codec. It supports 1 CPU present or absent event trap, 5 external event traps, and 127 internal programmable event traps to trigger maximum 133 different speech output. If more than two events happen simultaneously, the priority set is: SLOTOCC# > ...
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... W83791SD ...
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... NC 43, 44 SCL 21 SDA 22 +3.3VIN 34 EVNTRP1-4 45-48 W83791SD/W83791SG TYPE IN Event trapping to selection speech output sound End of Process signal input from cascaded Flash. t Resistor (Rosc) connects to VSB to adjust ring oscillator IN t frequency. Speech address pulse output, connect to W55FXX. When this ...
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... Event Trigger Queue W83791SD/SG provides 8 byte FIFO queue to store event trigger, i.e., the first 8 event can be served by speech and speech will clear FIFO queue after service. Coding of Speech program must assign correct CPU_MODE event vector to issue correct speech voices correspondent to speech trigger events ...
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... EVNTRAP4 EVNTRAP5 TRIGREG 6.1.3 Connection of EEPROM As described previously the W83791SD/SG could connect W55FXX to store voice data. To expand the storage capacity, users could select more than one W55FXX to connect together. The maximum capacity could 16Mbit. Following is the connection chart of W55FX with W83791SD/SG. ...
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... Speech Flash Data 0. Set speech flash programming R/W data bits [7:0]. Speech Flash Data 1. Set speech flash programming R/W data bits [15:8]. Speech Flash Data 2. Set speech flash programming R/W data bits [23:16]. Speech Flash Data 3. Set speech flash programming R/W data bits [31:24 W83791SD/W83791SG DESCRIPTION DESCRIPTION ...
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... This unit is Second. Default is 00, that is, the software event doesn’t need to wait then write to sound event queue. Note that, this function is controlled by Speech Input Property (Index 0Ah W83791SD/W83791SG DESCRIPTION No action Program mode Erase all Page code ...
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... Vector FEh (1111_1110b) (=80h+7Eh) 7Fh Vector FFh (1111_1111b) (=80h+7Fh) DESCRIPTION Enable W83791SD/SG to program external serial flash memory. Enable Software/Firmware Trigger Timeout Function. This bit sets the Event Trigger Timeout Function in Index 08h. If read this bit return “1” means SPKOUT is in busy. ...
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... Serial Bus Address <7:1> for general index registers. The address bit 0 and bit 1 are trapped by the pin 10 and pin 11, respectively. Device ID<6:0>, W83791D version ID that differentiates chip serial product number. This default value is 0010000b, that means is 1. W83791SD/W83791SG DESCRIPTION DESCRIPTION DESCRIPTION Publication Release Date: January 18, 2005 Revision 1.1 ...
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... BIT NAME ATTRIBUTE 7-0 CHIPID Read Only W83791SD/W83791SG DESCRIPTION Disable power-on abnormal the monitor voltage including Vcore, and +3.3V. If these voltages exceed the limit value, the pin of BEEP (Open Drain) will drive 300Hz and 600Hz frequency signal. Write 1, the frequency will be disabled. Default 0. After power on, the system should set 1 to this bit order to disable BEEP ...
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... TTL level bi-directional pin with source-sink capability 12t Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Input High Leakage Input Low Leakage W83791SD/W83791SG Speech Flash Read Data 2. Speech flash reading data RO bits [23:16]. Speech Flash Read Data 3. Speech flash reading data RO bits [31:24]. DESCRIPTION ...
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... TTL level input pin t Input Low Voltage Input High Voltage Input High Leakage Input Low Leakage IN - TTL level Schmitt-triggered input pin ts Input Low Threshold Voltage Input High Threshold Voltage Hysteresis Input High Leakage Input Low Leakage W83791SD/W83791SG SYM. MIN. TYP. MAX. V 0.5 0.8 1 1.6 2.0 2.4 ...
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... SDA OUT Serial Bus Timing PARAMETER SCL clock period Start condition hold time Stop condition setup-up time DATA to SCL setup time DATA to SCL hold time SCL and SDA rise time SCL and SDA fall time W83791SD/W83791SG t SCL SU;DAT VALID DATA t HD;DAT ...
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... HOW TO READ THE TOP MARKING The top marking of W83791SD Left: Winbond logo 1st line: part number W83791SD, D means LQFP (Thickness = 1.4 mm). 2nd line: Tracking code 025 GD 225: packages made in 2002, week 25 G: assembly house ID; A means ASE, O means OSE, G means Greatek revision; D means version D. ...
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... PACKAGE SPECIFICATION 48-pin LQFP See Detail F Seating Plane W83791SD/W83791SG Detail F Publication Release Date: January 18, 2005 - 15 - Dimension in inch Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 1.60 --- --- A 0.05 0.15 --- 1 A 1.45 1.35 1. 0.20 0.17 0.27 c --- 0 ...
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... R I2C slave address is 0x5A W83791SD/W83791SG R2 R 4.7K SMDAT SMCLK 3VCC R6 R 10K SLOTOCC# (From PII/PIII CPU) 0: means CPU is present 1: means CPU is absent VCC R7 4.7K R9 4.7K WINBOND ELECTRONICS CORP. Title W83791SD Application Circuit Size Document Number B Date: Tuesday, May 29, 2001 Rev 0.1 Sheet ...
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... VDD CTRL VDD VSS CLK VSS CLK ADDR DATA ADDR DATA W55F10 W55F10 WINBOND ELECTRONICS CORP. Title W83791SD Application Circuit Size Document Number Custom Date: Tuesday, May 29, 2001 Sheet 2 of Publication Release Date: January 18, 2005 Revision 1.1 Rev 0.1 3 ...
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... REV Decription 0.1 First Publication W83791SD/W83791SG WINBOND ELECTRONICS CORP. Title W83791SD Application circuit Size Document Number A Date: Tuesday, May 29, 2001 - 18 - Rev 0.1 Sheet ...
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... All the trade marks of products and companies mentioned in this data sheet belong to their respective owners. Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owner. W83791SD/W83791SG Winbond Electronics Corporation America 2727 North First Street, San Jose, CA 95134, U ...