W83977AF Information Storage Devices, Inc, W83977AF Datasheet - Page 135
W83977AF
Manufacturer Part Number
W83977AF
Description
W83877TF Plus Kbc, Cir, RTC
Manufacturer
Information Storage Devices, Inc
Datasheet
1.W83977AF.pdf
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CR71 (Default 0x02, read only)
CR74 (Default 0x02)
CRF0 (Default 0x0E)
FDD Mode Register
Bit 7-2 : Reserved.
Bit 1 : IRQLEV -- > IRQ Level
Bit 0 : IRQTYPE --> IRQ Type
Bit 7-3 : Reserved.
Bit 2-0 : These bits select DRQ resource for FDC.
Bit 7 : FIPURDWN
This bit controls the internal pull-up resistors of the FDC input pins RDATA, INDEX, TRAK0,
DSKCHG, and WP.
Bit 6 : INTVERTZ
This bit determines the polarity of all FDD interface signals.
Bit 5 : DRV2EN (PS2 mode only)
When this bit is a logic 0, indicates a second drive is installed and is reflected in status register A.
Bit 4 : Swap Drive 0, 1 Mode
Bit 3-2 Interface Mode
Bit 1 : FDC DMA Mode
Bit 0 : Floppy Mode
= 1: High; = 0: Low
= 1: Level trigger; = 0: Edge trigger
= 0x00 DMA0
= 0x01 DMA1
= 0x02 DMA2
= 0x03 DMA3
= 0x04-0x07 No DMA active
= 0
= 1
= 0
= 1
= 0
= 1
= 11
= 10 (Reserved)
= 01 PS/2
= 00 Model 30
= 0 Burst Mode is enabled
= 1 Non-Burst Mode (Default)
= 0 Normal Floppy Mode (Default)
= 1 Enhanced 3-Mode FDD
Drive and Motor sel 0 and 1 are swapped.
No Swap (Default)
The internal pull-up resistors of FDC are turned on.(Default)
The internal pull-up resistors of FDC are turned off.
FDD interface signals are active low.
FDD interface signals are active high.
AT Mode (Default)
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W83977F/ W83977AF
Publication Release Date: March 1998
PRELIMINARY
Revision 0.58
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