tc9446fg TOSHIBA Semiconductor CORPORATION, tc9446fg Datasheet - Page 20

• Manufacturer Part Number: tc9446fg
• Description: Audio Digital Processor For Decode Of Dolby Digital Ac-3 , Mpeg2 Audio
• Manufacturer: TOSHIBA Semiconductor CORPORATION

4)
5)
ON/OFF of soft reset
ON/OFF of soft reset. ON/OFF of soft reset are performed by carrying out and transmitting the bit of
the soft reset in a 24 bit command to “H” (ON) and “L” (OFF).
transmitted after 24 bit command transmission.
also possible to transmit a 24 bit command irrespective of the state of ACK bit.
Incorrect operation detection
reaction to the access demand from a MCU. Therefore, R/W of data need to be performed from a MCU
to TC9446FG at the interval of about 6 ms or more.
and is performed, since R/W of data were performed between about 6 ms back to the access demand
from a MCU when TC9446FG were operating normally.
access demand from a MCU, it is going to open the interval of about 6 ms or more and MCU is going
to make it access again, it will become a state ACK bit is “H” continued.
passes about 6 ms or more, ACK bit is disregarded, soft reset is turned ON, and each setup of
TC9446FG is performed again.
The case where a program is started after program boot, and in restarting a program, it performs
Since data with which ON/OFF of soft reset follows a command is not required, STOP Condition is
In addition, in order to return from a incorrect operation state, when turning ON soft reset, it is
The procedure of ON/OFF of soft reset is shown in Figure 14.
Incorrect operation detection of the internal program of TC9446FG is judged by the existence of the
ACK bit is set to “L”, when the following access demand opens the interval of about 6 ms or more
However, if TC9446FG become a incorrect operation state, even if it is going to stop receiving the
A MCU can perform incorrect operation detection by seeing this ACK bit.
That is, since TC9446FG are in a incorrect operation state when it is “H” fixation, even if ACK bit
Transmission of I
Transmission of 24 bit command
(soft reset ON/OFF = 0000x0h)
Figure 14 Procedure of ON/OFF of Soft Reset
Checking of ACK bit = “L”
Soft reset ON/OFF
START Condition
STOP Condition
2
C Address (3Ah)
20
At the time of ACK = “H”, it resumes from
START Condition. However, it is possible
to disregard and carry out command
transmission of the ACK bit at the time of
a reckless run.
Soft reset ON: Bit = “1”.
Soft reset OFF: Bit = “0”.
TC9446FG
2005-09-28