p89lpc935fdh NXP Semiconductors, p89lpc935fdh Datasheet - Page 49

• Manufacturer Part Number: p89lpc935fdh
• Description: 8-bit Microcontroller With Accelerated Two-clock 80c51 Core 4 Kb/8 Kb 3 V Byte-erasable Flash With 8-bit A/d Converters
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 15113
Product data sheet
8.28.1 General description
8.28.2 Features
8.27 Data EEPROM (P89LPC935/936)
8.28 Flash program memory
The P89LPC935/936 has 512 bytes of on-chip Data EEPROM. The Data EEPROM is
SFR based, byte readable, byte writable, and erasable (via row fill and sector fill). The
user can read, write and fill the memory via SFRs and one interrupt. This Data EEPROM
provides 100,000 minimum erase/program cycles for each byte.
After the operation finishes, the hardware will set the EEIF bit, which if enabled will
generate an interrupt. The flag is cleared by software.
The P89LPC933/934/935/936 flash memory provides in-circuit electrical erasure and
programming. The flash can be erased, read, and written as bytes. The Sector and Page
Erase functions can erase any flash sector (1 kB or 2 kB depending on the device) or
page (64 bytes). The Chip Erase operation will erase the entire program memory. ICP
using standard commercial programmers is available. In addition, IAP and byte-erase
allows code memory to be used for non-volatile data storage. On-chip erase and write
timing generation contribute to a user-friendly programming interface. The
P89LPC933/934/935/936 flash reliably stores memory contents even after 100,000 erase
and program cycles. The cell is designed to optimize the erase and programming
mechanisms. The P89LPC933/934/935/936 uses V
the Program/Erase algorithms.
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Byte mode: In this mode, data can be read and written one byte at a time.
Row fill: In this mode, the addressed row (64 bytes) is filled with a single value. The
entire row can be erased by writing 00H.
Sector fill: In this mode, all 512 bytes are filled with a single value. The entire sector
can be erased by writing 00H.
Programming and erase over the full operating voltage range.
Byte erase allows code memory to be used for data storage.
Read/Programming/Erase using ISP/IAP/ICP.
Internal fixed boot ROM, containing low-level IAP routines available to user code.
Default loader providing ISP via the serial port, located in upper end of user program
memory.
Boot vector allows user-provided flash loader code to reside anywhere in the flash
memory space, providing flexibility to the user.
Any flash program/erase operation in 2 ms.
Programming with industry-standard commercial programmers.
Programmable security for the code in the flash for each sector.
100,000 typical erase/program cycles for each byte.
10 year minimum data retention.
Rev. 06 — 20 June 2005
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC933/934/935/936
DD
as the supply voltage to perform
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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