p89lpc972fn NXP Semiconductors, p89lpc972fn Datasheet - Page 17

• Manufacturer Part Number: p89lpc972fn
• Description: 8-bit Microcontroller With Accelerated Two-clock 80c51 Core 2kb/4 Kb/8 Kb Wide-voltage Byte-erasable ?ash
• Manufacturer: NXP Semiconductors

Table 4.
* indicates SFRs that are bit addressable.
[1]
[2]
[3]
[4]
[5]
[6]
Name
TRIM
WDCON
WDL
WFEED1
WFEED2
All ports are in input only (high-impedance) state after power-up.
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.
The RSTSRC register reflects the cause of the P89LPC970/971/972 reset except BOIF bit. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the
power-on reset value is x011 0000.
After reset, the value is 1110 01x1, i.e., PRE2 to PRE0 are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.
Other resets will not affect WDTOF.
On power-on reset and watchdog reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
The only reset sources that affect these SFRs are power-on reset and watchdog reset.
Special function registers
Description
Internal oscillator
trim register
Watchdog
control register
Watchdog load
Watchdog feed 1
Watchdog feed 2
SFR addr. Bit functions and addresses
A7H
C1H
C2H
C3H
96H
…continued
RCCLK
PRE2
MSB
ENCLK
PRE1
TRIM.5
PRE0
TRIM.4
-
TRIM.3
-
WDRUN
TRIM.2
WDTOF
TRIM.1
WDCLK
TRIM.0
LSB
Reset value
Hex
[5][6]
[4][6]
FF
Binary
1111 1111