p89lpc9401 NXP Semiconductors, p89lpc9401 Datasheet

p89lpc9401

Manufacturer Part Number

p89lpc9401

Description

8-bit Microcontroller With Accelerated Two-clock 80c51 Core 8 Kb 3 V Byte-erasable Flash With 32 Segment X 4 Lcd Driver

Manufacturer

NXP Semiconductors

Datasheet

1.P89LPC9401.pdf (59 pages)

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Current page: 1 of 59
Download datasheet (298Kb)

1. General description

2. Features

2.1 Principal features

2.2 Additional features

The P89LPC9401 is a multi-chip module consisting of a P89LPC931 single-chip

microcontroller combined with a PCF8576D universal LCD driver in a low-cost 64-pin

package. The LCD driver provides 32 segments and supports from 1 to 4 backplanes.

Display overhead is minimized by an on-chip display RAM with auto-increment

addressing.

P89LPC9401

8-bit microcontroller with accelerated two-clock 80C51 core

8 kB 3 V byte-erasable ﬂash with 32 segment

Rev. 01 — 5 September 2005

8 kB byte-erasable ﬂash code memory organized into 1 kB sectors and 64-byte pages.

Single-byte erasing allows any byte(s) to be used as non-volatile data storage.

256-byte RAM data memory.

32 segment

Two analog comparators with selectable inputs and reference source.

Two 16-bit counter/timers (each may be conﬁgured to toggle a port output upon timer

overﬂow or to become a PWM output) and a 23-bit system timer that can also be used

as a Real-Time Clock (RTC).

Enhanced UART with fractional baud rate generator, break detect, framing error

detection, and automatic address detection; 400 kHz byte-wide I

communication port and SPI communication port.

High-accuracy internal RC oscillator option allows operation without external oscillator

components. The RC oscillator option is selectable and ﬁne tunable.

2.4 V to 3.6 V V

driven to 5.5 V).

64-pin LQFP package with 20 microcontroller I/O pins minimum and up to 23

microcontroller I/O pins while using on-chip oscillator and reset options.

Serial ﬂash In-Circuit Programming (ICP) allows simple production coding with

commercial EPROM programmers. Flash security bits prevent reading of sensitive

application programs.

A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns

for all instructions except multiply and divide when executing at 18 MHz. This is six

times the performance of the standard 80C51 running at the same clock frequency. A

lower clock frequency for the same performance results in power savings and reduced

EMI.

4 backplane LCD controller supports from 1 to 4 backplanes.

operating range. I/O pins are 5 V tolerant (may be pulled up or

Preliminary data sheet

C-bus

4 LCD driver

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