p80c592ffa-00 NXP Semiconductors, p80c592ffa-00 Datasheet - Page 25
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p80c592ffa-00
Manufacturer Part Number
p80c592ffa-00
Description
8-bit Microcontroller With On-chip Can
Manufacturer
NXP Semiconductors
Datasheet
1.P80C592FFA-00.pdf
(39 pages)
1. L = Level activated
2. T = Transition activated
1. User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that
Philips Semiconductors
An interrupt will be serviced as long as an interrupt of equal or
higher priority is not already being serviced. If an interrupt of equal
or higher level priority is being serviced, the new interrupt will wait
until it is finished before being serviced. If a lower priority level
Table 7.
NOTES:
Reduced EMI Mode
The AO bit (AUXR.0) in the AUXR register when set disables the ALE output, unless the CPU needs to perform an off-chip memory access.
2002 Jan 15
80C51 8-bit microcontroller family
4K/8K/16K/32K Flash
case, the reset or inactive value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
AUXR
Symbol
AO
—
External interrupt 0
External interrupt 1
SOURCE
Timer 0
Timer 1
Timer 2
UART
Interrupt Table
Address = 8EH
Not Bit Addressable
Function
Disable/Enable ALE
AO
0
1
Not implemented, reserved for future use
—
7
POLLING PRIORITY
Operating Mode
ALE is emitted at a constant rate of
ALE is active only during off-chip memory accesses.
—
6
1
2
3
4
5
6
—
5
Figure 15. AUXR: Auxiliary Register
1
.
—
4
REQUEST BITS
TF2, EXF2
RI, TI
TF0
TF1
IE0
IE1
25
1
/
3
—
3
the oscillator frequency (6 clock mode;
interrupt is being serviced, it will be stopped and the new interrupt
serviced. When the new interrupt is finished, the lower priority level
interrupt that was stopped will be completed.
—
2
HARDWARE CLEAR?
89C51/89C52/89C54/89C58
N (L)
N (L) Y (T)
—
1
1
Y
Y
N
N
Y (T)
AO
2
0
Reset Value = xxxx xxx0B
1
/
6
f
OSC
VECTOR ADDRESS
in 12 clock mode)
0BH
1BH
2BH
03H
13H
23H
Product data
SU01560