p80c592ffa-00 NXP Semiconductors, p80c592ffa-00 Datasheet - Page 28
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p80c592ffa-00
Manufacturer Part Number
p80c592ffa-00
Description
8-bit Microcontroller With On-chip Can
Manufacturer
NXP Semiconductors
Datasheet
1.P80C592FFA-00.pdf
(39 pages)
Philips Semiconductors
DC ELECTRICAL CHARACTERISTICS
T
NOTES:
1. Typical ratings are not guaranteed. The values listed are at room temperature, 5 V.
2. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the V
3. Capacitive loading on ports 0 and 2 may cause the V
4. Pins of ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
5. See Figures 26 through 29 for I
6. This value applies to T
7. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80 pF.
8. Under steady state (non-transient) conditions, I
9. ALE is tested to V
10. Pin capacitance is characterized but not tested. Pin capacitance is less than 25 pF. Pin capacitance of ceramic package is less than 15 pF
2002 Jan 15
amb
SYMBOL
V
V
V
V
V
V
V
I
I
I
I
R
C
IL
TL
LI
CC
IL
IH
IH1
OL
OL1
OH
OH1
80C51 8-bit microcontroller family
4K/8K/16K/32K Flash
RST
IO
to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify
ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. I
single output sinks more than 5 mA and no more than two outputs exceed the test conditions.
address bits are stabilizing.
maximum value when V
If I
test conditions.
(except EA is 25 pF).
= 0 C to +70 C or –40 C to +85 C; 5 V 10%; V
OL
Active mode:
Idle mode:
Maximum I
Maximum I
Maximum total I
exceeds the test condition, V
Input low voltage
Input high voltage (ports 0, 1, 2, 3, EA)
Input high voltage, XTAL1, RST
Output low voltage, ports 1, 2, 3
Output low voltage, port 0, ALE, PSEN
Output high voltage, ports 1, 2, 3
Output high voltage (port 0 in external bus mode),
ALE
Logical 0 input current, ports 1, 2, 3
Logical 1-to-0 transition current, ports 1, 2, 3
Input leakage current, port 0
Power supply current (see Figure 25):
Internal reset pull-down resistor
Pin capacitance
Active mode (see Note 5)
Idle mode (see Note 5)
Power-down mode or clock stopped (see Figure 29
9
OL
OL
for conditions)
, PSEN
per port pin:
per 8-bit port:
OH1
OL
I
I
CC(MAX)
CC(MAX)
, except when ALE is off then V
3
amb
for all outputs:
IN
10
is approximately 2 V.
= 0 C to +70 C.
(except EA)
PARAMETER
= (0.56
= (0.30
CC
test conditions and Figure 25 for I
OL
may exceed the related specification. Pins are not guaranteed to sink current greater than the listed
FREQ. + 8.0)mA
FREQ. +2.0)mA
15 mA (*NOTE: This is 85 C specification.)
26 mA
71 mA
8
3
OL
7, 8
must be externally limited as follows:
SS
OH
OH
= 0 V
6
on ALE and PSEN to momentarily fall below the V
is the voltage specification.
T
0.45 < V
amb
28
4.5 V < V
T
CC
amb
CONDITIONS
I
I
I
I
OH
vs Freq.
OL
OL
= –40 C to +85 C
V
V
V
V
OH
See Note 4
See Note 5
V
V
CC
CC
CC
CC
= 0 C to 70 C
IN
IN
= 1.6 mA
= 3.2 mA
= –3.2 mA
TEST
IN
= –30 A
= 0.4 V
= 2.0 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
CC
< V
< 5.5 V
CC
2
2
– 0.3
89C51/89C52/89C54/89C58
OL
OL
0.2 V
V
V
s of ALE and ports 1 and 3. The noise is due
can exceed these conditions provided that no
0.7 V
CC
CC
–0.5
MIN
–1
40
CC
– 0.7
– 0.7
CC
+0.9
CC
LIMITS
TYP
–0.7 specification when the
3
1
0.2 V
V
V
CC
CC
MAX
–650
–75
100
125
225
0.4
0.4
15
CC
10
+0.5
+0.5
–0.1
Product data
UNIT
k
pF
V
V
V
V
V
V
V
A
A
A
A
A