p87c591vfb NXP Semiconductors, p87c591vfb Datasheet - Page 33
p87c591vfb
Manufacturer Part Number
p87c591vfb
Description
Single-chip 8-bit Microcontroller With Can Controller
Manufacturer
NXP Semiconductors
Datasheet
1.P87C591VFB.pdf
(160 pages)
- Current page: 33 of 160
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Philips Semiconductors
Notes
1. On Bus-Off the Error Warning Interrupt is set, if enabled.
2. If the Reset Mode was entered due to a Bus-off condition, the Receive Error Counter is cleared and the Transmit Error
3. Internal read/write pointers of the RXFIFO are reset to their initial values. A subsequent read access to the RXB would
2000 Jul 26
112 to 124
125 to 127
96 to 108
ADDR.
32 to 35
36 to 39
40 to 43
44 to 47
48 to 51
52 to 55
56 to 59
60 to 63
Single-chip 8-bit microcontroller with CAN controller
Counter is initialized to 127 to count-down the CAN-defined Bus-off recovery time consisting of 128 occurrences of
11 consecutive recessive bits.
show undefined data values (parts of old messages). If a message is transmitted, this message is written in parallel to
the Receive Buffer. A Receive Interrupt is generated only, if this transmission was forced by the Self Reception Request.
So, even if the Receive Buffer is empty, the last transmitted message may be read from the Receive Buffer until it is
overridden by the next received or transmitted message. Upon a Hardware Reset, the RXFIFO pointers are reset to the
physical RAM address “0”. Setting MOD.0 by software or due to the Bus-Off event will reset the RXFIFO pointers to the
currently valid FIFO Start Address (RBSA Register) which is different from the RAM address ”0” after the first Release
Receive Buffer command.
10
11
12
13
14
15
29
30
31
9
Rx Message Counter
Rx Buffer Start Address
Arbitr. Lost Capture
Error Code Capture
Error Warning Limit
Rx Error Counter
Tx Error Counter
ACF Mode
ACF Enable
ACF Priority
Bank 1
Bank 2
Bank 3
Bank 4
Rx Buffer
Tx Buffer
General Purpose RAM
REGISTER
AMR 0 to 3
ACR 0 to 3
AMR 0 to 3
ACR 0 to 3
AMR 0 to 3
ACR 0 to 3
AMR 0 to 3
ACR 0 to 3
ACFMOD.7
ACFMOD.6
ACFMOD.5
ACFMOD.4
ACFMOD.3
ACFMOD.2
ACFMOD.1
ACFMOD.0
ACFEN.7
ACFEN.6
ACFEN.5
ACFEN.4
ACFEN.3
ACFEN.2
ACFEN.1
ACFEN.0
ACFPRIO.7
ACFPRIO.6
ACFPRIO.5
ACFPRIO.4
ACFPRIO.3
ACFPRIO.2
ACFPRIO.1
ACFPRIO.0
BIT
RMC
RBSA
ALC
ECC
EWLR
RXERR
TXERR
MFORMATB4
AMODEB4
MFORMATB3
AMODEB3
MFORMATB2
AMODEB2
MFORMATB1
AMODEB1
B4F2EN
B4F1EN
B3F2EN
B3F1EN
B2F2EN
B2F1EN
B1F2EN
B1F1EN
B4F2PRIO
B4F1PRIO
B3F2PRIO
B3F1PRIO
B2F2PRIO
B2F1PRIO
B1F2PRIO
B1F1PRIO
ACR0 to ACR3
AMR0 to AMR3
ACR0 to ACR3
AMR0 to AMR3
ACR0 to ACR3
AMR0 to AMR3
ACR0 to ACR3
AMR0 to AMR3
RXB
TXB
SYMBOL
Rx Message Counter
Rx Buffer Start Address
Arbitration Lost Capture
Error Code Capture
Error Warning Limit Register
Receive Error Counter
Transmit Error Counter
Message Format Bank4
Accept. Filt. Mode Bank Message
Format Bank3
Accept. Filt. Mode Bank3
Message Format Bank2
Accept. Filt. Mode Bank2
Message Format Bank1
Accept. Filt. Mode Bank1
Bank 4 Filter 2 Enable
Bank 4 Filter 1 Enable
Bank 3 Filter 2 Enable
Bank 3 Filter 1 Enable
Bank 2 Filter 2 Enable
Bank 2 Filter 1 Enable
Bank 1 Filter 2 Enable
Bank 1 Filter 1 Enable
Bank 4 Filter 2 Priority
Bank 4 Filter 1 Priority
Bank 3 Filter 2 Priority
Bank 3 Filter 1 Priority
Bank 2 Filter 2 Priority
Bank 2 Filter 1 Priority
Bank 1 Filter 2 Priority
Bank 1 Filter 1 Priority
Acceptance Code Register
Acceptance Mask Register
Acceptance Code Register
Acceptance Mask Register
Acceptance Code Register
Acceptance Mask Register
Acceptance Code Register
Acceptance Mask Register
Receive Buffer
Transmit Buffer
General Purpose RAM
33
NAME
0
00000000
0
0
96d
0 (reset)
0 (reset)
0 (SFF)
0 (dual)
0 (SFF)
0 (dual)
0 (SFF)
0 (dual)
0 (SFF)
0 (dual)
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X empty (3)
X no change
X no change
HARDWARE
RESET BY
b
Preliminary Specification
SETTING MOD.0 BY
0
X no change
X no change
X no change
X no change
X no change (2)
X no change (2)
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X empty (3)
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
X no change
DUE TO BUS-OFF
SOFTWARE OR
P8xC591
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