p89cv51rb2 NXP Semiconductors, p89cv51rb2 Datasheet - Page 25

• Manufacturer Part Number: p89cv51rb2
• Description: P89cv51rb2/rc2/rd2 8-bit 80c51 5 V Low Power 64 Kb Flash Microcontroller With 1 Kb Ram, Spi, 6-clock Cpu With 6/12-clock Peripherals
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89CV51RB2_RC2_RD2_1
Product data sheet
The ‘Timer’ or ‘Counter’ function is selected by control bits C/T in the special function
register TMOD. These two timers/counters have four operating modes, which are selected
by bit-pairs (M1, M0) in TMOD. Modes 0, 1, and 2 are the same for both timers/counters.
Mode 3 is different. The four operating modes are described in the following text.
Table 13.
Not bit addressable; reset value: 0000 0000B; reset source(s): any source.
Table 14.
Table 15.
Table 16.
Bit addressable; reset value: 0000 0000B; reset source(s): any reset.
Bit
7
6
5
4
3
2
1
0
M1
0
0
1
1
1
Bit
Symbol
Bit
Symbol
Symbol
T1GATE
T1C/T
T1M1
T1M0
T0GATE
T0C/T
T0M1
T0M0
M0
0
1
0
1
1
TMOD - Timer/Counter mode control register (address 89H) bit allocation
TMOD - Timer/Counter mode control register (address 89H) bit description
TMOD - Timer/Counter mode control register (address 89H) M1/M0 operating
mode
TCON - Timer/Counter control register (address 88H) bit allocation
T1GATE
TF1
7
7
Description
Gating control for Timer 1. When set, timer/counter is enabled only while
the INT1 pin is HIGH and the TR1 control bit is set. When cleared, Timer 1
is enabled when the TR1 control bit is set.
Timer or counter select for Timer 1. Cleared for timer operation. Set for
counter operation (input from T1 input pin).
Mode select for Timer 1.
Gating control for Timer 0. When set, timer/counter is enabled only while
the INT0 pin is HIGH and the TR0 control bit is set. When cleared, Timer 0
is enabled when the TR0 control bit is set.
Timer or counter select for Timer 0. Cleared for timer operation. Set for
counter operation (input from T0 input pin).
Mode select for Timer 0.
Operating mode
0
1
2
3
3
Rev. 01 — 5 October 2007
T1C/T
TR1
6
6
T1M1
TF0
5
5
8048 timer ‘TLx’ serves as 5-bit prescaler.
16-bit timer/counter ‘THx’ and ‘TLx' are cascaded;
there is no prescaler.
8-bit auto-reload timer/counter ‘THx’ holds a value
which is to be reloaded into ‘TLx’ each time it overflows.
(Timer 0) TL0 is an 8-bit timer/counter controlled by the
standard Timer 0 control bits. TH0 is an 8-bit timer only
controlled by Timer 1 control bits.
(Timer 1) timer/counter 1 stopped.
P89CV51RB2/RC2/RD2
T1M0
TR0
4
4
T0GATE
IE1
3
3
80C51 with 1 kB RAM, SPI
T0C/T
IT1
2
2
© NXP B.V. 2007. All rights reserved.
T0M1
IE0
1
1
T0M0
25 of 73
IT0
0
0