p89cv51rb2 NXP Semiconductors, p89cv51rb2 Datasheet - Page 8

• Manufacturer Part Number: p89cv51rb2
• Description: P89cv51rb2/rc2/rd2 8-bit 80c51 5 V Low Power 64 Kb Flash Microcontroller With 1 Kb Ram, Spi, 6-clock Cpu With 6/12-clock Peripherals
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 3.
[1]
[2]
6. Functional description
P89CV51RB2_RC2_RD2_1
Product data sheet
Symbol
RST
EA
ALE
XTAL1
XTAL2
V
V
DD
SS
ALE loading issue: When ALE pin experiences higher loading (> 30 pF) during the reset, the microcontroller may accidentally enter into
modes other than normal working mode. The solution is to add a pull-up resistor from 3 k to 50 k between e.g., ALE pin and V
For 6-clock mode, ALE is emitted at
P89CV51RB2/RC2/RD2 Pin description
Pin
PLCC44
10
35
33
21
20
44
22
6.1 Special function registers
Remark: SFR accesses are restricted in the following ways:
TQFP44
4
29
27
15
14
38
16
•
•
•
Do not attempt to access any SFR locations that are undefined.
Access to defined SFR locations must be strictly for the functions of the SFRs.
SFR bits labeled ‘-’, ‘0’ or ‘1’ can only be written and read as follows:
– ‘-’ Unless otherwise specified, must be written with ‘0’, but can return any value
– ‘0’ must be written with ‘0’, and will return a ‘0’ when read.
– ‘1’ must be written with ‘1’, and will return a ‘1’ when read.
when read (even if it was written with ‘0’). It is a reserved bit and may be used in
future derivatives.
1
3
Type
I
I
I/O
I
O
supply
supply
of crystal frequency.
Description
Reset: While the oscillator is running, a HIGH logic state on this pin for two
machine cycles will reset the device.
External Access Enable: EA must be connected to V
the device to fetch code from the external program memory. EA must be
strapped to V
Address Latch Enable: ALE is the output signal for latching the low byte of
the address during an access to external memory. Normally the ALE
emitted at a constant rate of
external timing and clocking. One ALE pulse is skipped during each access
to external data memory. However, if bit AO is set to 1, ALE is disabled.
Crystal 1: Input to the inverting oscillator amplifier and input to the internal
clock generator circuits.
Crystal 2: Output from the inverting oscillator amplifier.
Power supply
Ground
Rev. 01 — 5 October 2007
…continued
DD
for internal program execution.
P89CV51RB2/RC2/RD2
1
6
the crystal frequency
80C51 with 1 kB RAM, SPI
[2]
SS
and can be used for
© NXP B.V. 2007. All rights reserved.
in order to enable
[1]
8 of 73
is
DD
.