tc59lm836dkb TOSHIBA Semiconductor CORPORATION, tc59lm836dkb Datasheet - Page 10

• Manufacturer Part Number: tc59lm836dkb
• Description: 288mbits Network Fcram2 ? 2,097,152-words ? 4 Banks ? 36-bits
• Manufacturer: TOSHIBA Semiconductor CORPORATION

AC CHARACTERISTICS AND OPERATING CONDITIONS
t
t
t
t
t
t
t
t
I
I
I
I
I
I
I
I
I
I
I
I
I
SYMBOL
LZ
HZ
QPDH
PDEX
T
FPDL
REFI
PAUSE
RC
RCD
RAS
RBD
RWD
WRD
RSC
PD
PDA
PDV
REFC
CKD
LOCK
Data-out Low Impedance Time from
CLK
Data-out High Impedance Time from
CLK
Last output to PD High Hold Time
Power Down Exit Time
Input Transition Time
Self-Refresh Entry
Auto-Refresh Average Interval
Pause Time after Power-up
Random Read/Write
Cycle Time
(applicable to same bank)
RDA/WRA to LAL Command Input
Delay (applicable to same bank)
LAL to RDA/WRA
Command Input Delay
(applicable to same bank)
Random Bank Access Delay
(applicable to other bank)
LAL following RDA to
WRA Delay
(applicable to other bank)
LAL following WRA to RDA Delay
(applicable to other bank)
Mode Register Set Cycle
Time
Buffer
Buffer
Power down mode valid
from REF command
Auto-Refresh Cycle Time
REF Command to Clock Input
Disable at Self-Refresh Entry
DLL Lock-on Time
(applicable to RDA command)
PD Low Input Window for
PD Low to Inactive State of Input
PD High to Active State of Input
PARAMETER
C
C
C
C
C
C
B
B
C
C
C
C
C
C
C
C
C
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
= 2
= 4
= 4
= 5
= 6
= 4
= 5
= 6
= 4
= 5
= 6
= 4
= 5
= 6
= 4
= 5
= 6
−0.5 × t
I
REFC
MIN
−0.5
200
200
0.6
0.1
0.4


19
23
25
19
23
25
0
5
6
7
1
4
5
6
2
2
3
1
7
7
7
1
CK
-33
MAX
0.5
3.9


























1
5
1
2
−0.5 × t
(Notes: 1, 2) (continued)
I
REFC
MIN
−0.6
200
200
0.7
0.1
0.4


19
23
25
19
23
25
TC59LM836DKB-33,-40
0
5
6
7
1
4
5
6
2
2
3
1
7
7
7
1
CK
-40
2005-11-08 10/65
MAX
0.6
3.9


























1
5
1
2
UNIT NOTES
cycle
ns
µs
Rev 1.4
3, 6, 8
3, 7, 8
3
3
5