ak5702 AKM Semiconductor, Inc., ak5702 Datasheet - Page 54

• Manufacturer Part Number: ak5702
• Description: 4-channel Adc With Pll & Mic-amp
• Manufacturer: AKM Semiconductor, Inc.

■
MS0623-E-00
Addr
01H
Addr
00H
Register Definitions
PMADAL: MIC-AmpA Lch and ADCA Lch Power Management
PMADAR: MIC-AmpA Rch and ADCA Rch Power Management
PMVCM: VCOM Power Management
Each block can be powered-down respectively by writing “0” in each bit of this address. When the PDN pin is “L”, all
blocks are powered-down regardless as setting of this address. In this case, register is initialized to the default value.
When PMVCM, PMADAL, PMADAR, PMADBL, PMADBR, PMPLL, PMPLL, PMMPA,PMMPB and MCKO bits
are “0”, all blocks are powered-down. The register values remain unchanged.
When the all ADC is powered-down, external clocks may not be present. When one of the ADC is powered -up,
external clocks must always be present.
PMPLL: PLL Power Management
M/S: Master / Slave Mode Select
PLL3-0: PLL Reference Clock Select (Table 4)
0: Power down (default)
1: Power up
0: Power down (default)
1: Power up
0: Power down (default)
1: Power up
0: EXT Mode and Power Down (default)
1: PLL Mode and Power up
0: Slave Mode (default)
1: Master Mode
Default: “1001” (MCKI pin=12MHz)
Register Name
PLL Control
Register Name
Power Management
@fs= 44.1kHz, HPFA1-0 bits = “00”) starts. After initializing, digital data of the ADC is output.
when PMADAL=PMADAR= PMADBL=PMADBR =PMPLL=PMMPA=PMMPB=MCKO bits = “0”.
When the PMADAL or PMADAR bit is changed from “0” to “1”, the initialization cycle (3088/fs=70.0ms
Default
When any blocks are powered-up, the PMVCM bit must be set to “1”. PMVCM bit can be set to “0” only
Default
D7
D7
0
0
0
0
D6
0
0
D6
0
0
D5
PLL3
0
0
- 54 -
D5
1
D4
PLL2
0
0
D4
0
D3
0
0
PLL1
D3
0
PMVCM
D2
PLL0
0
D2
1
PMADAR
D1
M/S
0
D1
0
[AK5702]
PMADAL
2007/06
PMPLL
D0
0
D0
0