ak5366vr AKM Semiconductor, Inc., ak5366vr Datasheet - Page 27

• Manufacturer Part Number: ak5366vr
• Description: 24-bit 48khz Adc With Selector/pga/alc
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
[4] Example of ALC Operation
The following registers should not be changed during the ALC operation.
the
Note : After ALC operation is disabled, the IPGA changes to the last written data during or before ALC operation.
MS0526-E-00
(1): Enable soft mute (2): Disable soft mute
The IPGA value of Lch becomes the start value if the IPGA value is different with Lch and Rch when the ALC starts.
LTM1-0, LMTH, LMAT, WTM1-0, ZTM1-0, RATT, REF7-0, ZELMN bits
Writing to the area over 80H (Table 17) of IPGL/R registers (04H, 05H) is ignored during ALC operation.
After ALC is disabled, the IPGA changes to the last written data by zero-crossing or time-out. In case of writing to
DATT area (Table 11) of DATT registers (08H, 09H), the DATT changes even if ALC is enabled.
Figure 13. Registers set-up sequence at ALC operation
Finish ALC mode and return to manual mode
Note : WR : Write
No
Set (SEL2-0 bits or SEL2-0 pins)
WR (ZTM1-0, WTM1-0, LTM1-0)
(1)
(2)
(1)
(2)
ALC OFF (WR: ALC = “0”)
WR (LMAT, RATT, LMTH)
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Finish ALC mode?
PDN = “L”
WR (ALC = “1”)
WR (ALC = “0”)
ALC Operation
ALC Operation
WR (IPGA7-0)
WR (REF7-0)
Manual Mode
Yes
“H”
[AK5366VR ]
2006/07