xr16v564 Exar Corporation, xr16v564 Datasheet - Page 25

• Manufacturer Part Number: xr16v564
• Description: 2.25v To 3.6v Quad Uart With 32-byte Fifo
• Manufacturer: Exar Corporation

REV. 1.0.1
A
A2-A0
DDRESS
0 1 0
0 0 0
0 0 0
0 0 1
0 1 0
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 0
0 0 1
T
ABLE
N
MCR
MSR
RHR
THR
FCR
SPR
DLM
LCR
LSR
DLD
R
DLL
IER
ISR
AME
10: INTERNAL REGISTERS DESCRIPTION.
EG
RD/WR
RD/WR Divisor
RD/WR
RD/WR RX FIFO
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
W
R
WR
WR
RD
RD
EAD
RITE
/
RX FIFO
Enabled
Enable
Trigger
Enable
Global
FIFOs
CTS#
Pres-
B
Rsvd
BRG
caler
Error
Input
Bit-7
Bit-7
CD#
Bit-7
Bit-7
Bit-7
Int.
IT
0/
0/
-7
RX FIFO
Enabled
IR Mode
ENable
Enable
Trigger
Set TX
THR &
Empty
FIFOs
Break
RTS#
B
Rsvd
Input
Bit-6
Bit-6
TSR
Bit-6
Bit-6
Bit-6
RI#
Int.
IT
0/
0/
-6
16C550 Compatible Registers
Baud Rate Generator Divisor
4X Mode 8X Mode
TX FIFO
Xon Any
Xoff Int.
Enable
Trigger
Empty
DSR#
Parity
B
Input
Bit-5
Bit-5
THR
Bit-5
Bit-5
Bit-5
RTS
CTS
Set
Int
IT
0/
0/
0/
0/
-5
25
RX Break
TX FIFO
Lopback
Internal
Enable
Trigger
Enable
Sleep
Parity
CTS#
Mode
B
Even
Input
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Xoff
Int
2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO
IT
0/
0/
0/
-4
S
HADED BITS ARE ENABLED WHEN
INT Out-
Stat. Int.
Framing
Modem
Source
(OP2#)
Enable
Enable
Enable
Enable
Mode
Parity
B
Delta
DMA
Error
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
CD#
INT
put
RX
IT
-3
RX Line
Source
(OP1#)
Enable
Reset
Parity
B
FIFO
Rsvd
Error
Delta
Bit-2
Bit-2
Stat.
Bit-2
Stop
Bit-2
Bit-2
Bit-2
Bit-2
Bits
INT
RI#
Int.
RX
TX
IT
-2
Source
Control
Enable
Length
Output
Empty
Reset
DSR#
RTS#
Over-
B
Word
Delta
FIFO
Error
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
INT
RX
RX
run
TX
Int
IT
-1
XR16V564/564D
Source
Control
EFR B
Enable
Enable
Length
Output
Ready
FIFOs
DTR#
CTS#
B
Word
Delta
Bit-0
Bit-0
Data
Bit-0
Bit-0
Data
Bit-0
Bit-0
Bit-0
Bit-0
INT
RX
Int.
RX
IT
-0
IT
-4=1
LCR≠0xBF
LCR≠0xBF
LCR[7] = 0
LCR[7] = 0
LCR[7] = 1
EFR[4] = 1
C
LCR[7]=1
OMMENT