xr16v564 Exar Corporation, xr16v564 Datasheet - Page 55

• Manufacturer Part Number: xr16v564
• Description: 2.25v To 3.6v Quad Uart With 32-byte Fifo
• Manufacturer: Exar Corporation

REV. 1.0.1
ABSOLUTE MAXIMUM RATINGS ................................................................................. 40
TYPICAL PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%) 40
ELECTRICAL CHARACTERISTICS............................................................................... 40
TABLE OF CONTENTS .....................................................................................................
DC E
AC E
TA = -40
P
R
ACKAGE
4.4 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY .................................................................................. 28
4.5 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY ........................................................................................ 29
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE ........................................................................................ 31
4.7 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE . 32
4.8 LINE STATUS REGISTER (LSR) - READ/WRITE ............................................................................................ 34
4.9 MODEM STATUS REGISTER (MSR) - READ/WRITE...................................................................................... 35
4.10 SCRATCH PAD REGISTER (SPR) - READ/WRITE ....................................................................................... 35
4.11 BAUD RATE GENERATOR REGISTERS (DLL AND DLM) - READ/WRITE................................................. 36
4.12 ENHANCED FEATURE REGISTER (EFR) - READ/WRITE ........................................................................... 36
4.13 SOFTWARE FLOW CONTROL REGISTERS (XOFF1, XOFF2, XON1, XON2) - READ/WRITE................... 38
EVISION
T
T
T
T
T
T
T
F
F
F
F
F
F
F
F
F
F
F
F
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
LECTRICAL
LECTRICAL
4.4.1 INTERRUPT GENERATION: ........................................................................................................................................ 28
4.4.2 INTERRUPT CLEARING: ............................................................................................................................................. 28
11: I
12: T
13: P
14: INT O
15: S
16: S
17: UART RESET CONDITIONS FOR CHANNELS A-D ................................................................................................. 39
O TO
14. C
15. M
16. 16 M
17. 16 M
18. 68 M
20. R
19. 68 M
21. T
22. R
23. R
24. T
25. T
H
D
IMENSIONS
ISTORY
NTERRUPT
RANSMIT AND
ARITY SELECTION
AMPLING
OFTWARE
RANSMIT
RANSMIT
RANSMIT
LOCK
ECEIVE
ECEIVE
ECEIVE
+85
ODEM
C
C
UTPUT
ODE
ODE
ODE
ODE
HARACTERISTICS
HARACTERISTICS
O
T
..................................................................................................................................... 53
I
C, V
IMING
NPUT
R
R
R
R
(I
(I
(M
(M
S
F
R
R
R
EADY
EADY
EADY
ATE
NTEL
NTEL
................................................................................................................................ 49
OURCE AND
LOW
M
EADY
EADY
EADY
OTOROLA
OTOROLA
ODES
R
/O
............................................................................................................................................................. 42
CC IS
S
ECEIVE
) D
) D
UTPUT
& I
& I
& I
C
ELECT
& I
& I
& I
........................................................................................................................................................ 32
ONTROL
ATA
ATA
NTERRUPT
NTERRUPT
NTERRUPT
..................................................................................................................................................... 33
NTERRUPT
NTERRUPT
NTERRUPT
2.25
) D
) D
FIFO T
T
B
B
P
............................................................................................................................................... 36
IMING
ATA
ATA
US
US
RIORITY
F
............................................................................................................. 40
............................................................................................................. 41
TO
UNCTIONS
R
W
B
B
EAD
T
T
T
RIGGER
RITE
US
US
F
T
T
T
IMING
IMING
IMING
3.6V, 70
OR
IMING
IMING
IMING
L
R
W
T
EVEL
T
C
EAD
IMING FOR
RITE
IMING FOR
HANNELS
[N
[FIFO M
[FIFO M
L
........................................................................................................................ 37
[N
[FIFO M
[FIFO M
EVEL
ON
T
..................................................................................................................... 29
T
IMING FOR
ON
IMING FOR
-FIFO M
P
-FIFO M
S
F
ODE
ODE
C
A-D .................................................................................................... 43
ELECTION
C
ODE
ODE
LOAD WHERE APPLICABLE
HANNELS
HANNELS
, DMA D
, DMA E
II
ODE
, DMA M
, DMA M
C
ODE
C
HANNELS
HANNELS
2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO
]
FOR
]
............................................................................................ 30
A-D ................................................................................... 43
FOR
A-D .................................................................................. 44
NABLED
ISABLED
ODE
ODE
C
C
HANNELS
A-D........................................................................... 44
A-D ......................................................................... 45
HANNELS
D
E
]
NABLED
]
ISABLED
FOR
FOR
C
A-D ............................................................ 45
C
A-D .......................................................... 46
HANNELS
]
HANNELS
]
FOR
FOR
............................................. 41
C
C
HANNELS
HANNELS
A-D............................................ 47
A-D........................................... 46
A-D ............................... 48
A-D .............................. 47
XR16V564/564D
I