xr16v564 Exar Corporation, xr16v564 Datasheet - Page 6

• Manufacturer Part Number: xr16v564
• Description: 2.25v To 3.6v Quad Uart With 32-byte Fifo
• Manufacturer: Exar Corporation

XR16V564/564D
2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO
Pin Description
MODEM OR SERIAL I/O INTERFACE
INTSEL
DSRC#
DSRD#
RTSC#
RTSD#
CTSC#
CTSD#
DTRA#
DTRB#
DTRC#
DTRD#
DSRA#
DSRB#
RTSA#
RTSB#
CTSA#
CTSB#
N
RXA
RXB
RXC
RXD
TXA
TXB
TXC
TXD
AME
48-QFN
P
38
28
30
48
13
22
36
25
33
12
23
35
IN
11
6
8
3
1
-
-
-
-
-
-
-
-
#
64-LQFP
P
10
39
41
62
20
29
51
13
36
44
16
33
47
15
34
46
17
32
48
IN
8
5
2
3
1
-
#
68-PLCC
P
65
17
19
51
53
29
41
63
14
22
48
56
25
45
59
12
24
46
58
10
26
44
60
IN
11
7
#
80-LQFP
P
67
10
12
50
52
77
25
37
65
15
47
55
18
44
58
17
45
57
19
43
59
IN
7
4
5
3
#
T
6
YPE
O
O
O
I
I
I
I
Interrupt Select (active high, input with internal pull-
down).
When 16/68# pin is HIGH for Intel bus interface, this
pin can be used in conjunction with MCR bit-3 to
enable or disable the INT A-D pins or override MCR
bit-3 and enable the interrupt outputs. Interrupt out-
puts are enabled continuously when this pin is HIGH.
MCR bit-3 enables and disables the interrupt output
pins. In this mode, MCR bit-3 is set to a logic 1 to
enable the continuous output. See MCR bit-3 descrip-
tion for full detail. This pin must be LOW in the Motor-
ola bus interface mode. For the 64 pin packages, this
pin is bonded to VCC internally in the XR16V564D so
the INT outputs operate in the continuous interrupt
mode. This pin is bonded to GND internally in the
XR16V564 and therefore requires setting MCR bit-3
for enabling the interrupt output pins.
UART channels A-D Transmit Data and infrared trans-
mit data. Standard transmit and receive interface is
enabled when MCR[6] = 0. In this mode, the TX signal
will be a HIGH during reset, or idle (no data). Infrared
IrDA transmit and receive interface is enabled when
MCR[6] = 1. In the Infrared mode, the inactive state
(no data) for the Infrared encoder/decoder interface is
a logic 0.
UART channel A-D Receive Data or infrared receive
data. Normal receive data input must idle HIGH.
UART channels A-D Request-to-Send (active low) or
general purpose output. This output must be asserted
prior to using auto RTS flow control, see EFR[6],
MCR[1], and IER[6]. Also see
outputs are not used, leave them unconnected.
UART channels A-D Clear-to-Send (active low) or gen-
eral purpose input. It can be used for auto CTS flow
control, see EFR[7], and IER[7]. Also see
These inputs should be connected to VCC when not
used.
UART channels A-D Data-Terminal-Ready (active low)
or general purpose output. If these outputs are not
used, leave them unconnected.
UART channels A-D Data-Set-Ready (active low) or
general purpose input. This input should be connected
to VCC when not used. This input has no effect on the
UART.
D
ESCRIPTION
Figure 11
Figure 11
. If these
REV. 1.0.1
.