xr16v564 Exar Corporation, xr16v564 Datasheet - Page 4

no-image

xr16v564

Manufacturer Part Number
xr16v564
Description
2.25v To 3.6v Quad Uart With 32-byte Fifo
Manufacturer
Exar Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
xr16v564DIV-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Company:
Part Number:
xr16v564DIV-F
Quantity:
3 700
Part Number:
xr16v564IJ-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
xr16v564IL-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
Company:
Part Number:
xr16v564IL-F
Quantity:
260
Part Number:
xr16v564IV-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
xr16v564IV-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
Company:
Part Number:
xr16v564IV-F
Quantity:
260
Part Number:
xr16v564IV80
Manufacturer:
EXAR
Quantity:
275
Part Number:
xr16v564IV80
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
Part Number:
xr16v564IV80-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
xr16v564IV80-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
Company:
Part Number:
xr16v564IV80-F
Quantity:
2 710
XR16V564/564D
2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO
PIN DESCRIPTIONS
Pin Description
ORDERING INFORMATION
DATA BUS INTERFACE
(R/W#)
(VCC)
IOW#
CSA#
(CS#)
N
IOR#
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
AME
XR16V564IV80
XR16V564DIV
P
XR16V564IV
XR16V564IL
XR16V564IJ
ART
48-QFN
P
N
15
16
17
46
45
44
43
42
41
40
39
29
IN
7
5
UMBER
#
64-LQFP
P
22
23
24
60
59
58
57
56
55
54
53
40
IN
9
7
#
68-PLCC
P
32
33
34
68
67
66
52
18
16
IN
5
4
3
2
1
#
68-Lead PLCC
64-Lead LQFP
64-Lead LQFP
80-Lead LQFP
48-pin QFN
80-LQFP
P
P
ACKAGE
28
29
30
75
74
73
72
71
70
69
68
51
11
IN
9
#
T
4
I/O
YPE
I
I
I
I
Address data lines [2:0]. These 3 address lines select
one of the internal registers in UART channel A-D dur-
ing a data bus transaction.
Data bus lines [7:0] (bidirectional).
When 16/68# pin is HIGH, the Intel bus interface is
selected and this input becomes read strobe (active
low). The falling edge instigates an internal read cycle
and retrieves the data byte from an internal register
pointed by the address lines [A2:A0], puts the data
byte on the data bus to allow the host processor to
read it on the rising edge.
When 16/68# pin is LOW, the Motorola bus interface is
selected and this input is not used and should be con-
nected to VCC.
When 16/68# pin is HIGH, it selects Intel bus interface
and this input becomes write strobe (active low). The
falling edge instigates the internal write cycle and the
rising edge transfers the data byte on the data bus to
an internal register pointed by the address lines.
When 16/68# pin is LOW, the Motorola bus interface is
selected and this input becomes read (logic 1) and
write (LOW) signal.
When 16/68# pin is HIGH, this input is chip select A
(active low) to enable channel A in the device.
When 16/68# pin is LOW, this input becomes the chip
select (active low) for the Motorola bus interface.
O
PERATING
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
R
ANGE
T
EMPERATURE
D
ESCRIPTION
D
EVICE
Active
Active
Active
Active
Active
REV. 1.0.1
S
TATUS

Related parts for xr16v564