xr17l152im Exar Corporation, xr17l152im Datasheet - Page 36
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xr17l152im
Manufacturer Part Number
xr17l152im
Description
3.3v Pci Bus Dual Uart
Manufacturer
Exar Corporation
Datasheet
1.XR17L152IM.pdf
(55 pages)
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LCR[2]: TX and RX Stop-bit Length Select
The length of stop bit is specified by this bit in conjunction with the programmed word length.
LCR[3]: TX and RX Parity Select
Parity or no parity can be selected via this bit. The parity bit is a simple way used in communications for data
integrity check. See
LCR[4]: TX and RX Parity Select
If the parity bit is enabled with LCR bit-3 set to a logic 1, LCR BIT-4 selects the even or odd parity format.
LCR[5]: TX and RX Parity Select
If the parity bit is enabled, LCR BIT-5 selects the forced parity format.
LCR[6]: Transmit Break Enable
When enabled the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space”, logic 0, state). This condition remains until disabled by setting LCR bit-6 to a logic 0.
Logic 0 = No parity.
Logic 1 = A parity bit is generated during the transmission while the receiver checks for parity error of the
data character received.
Logic 0 = ODD Parity is generated by forcing an odd number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format (default).
Logic 1 = EVEN Parity is generated by forcing an even the number of logic 1’s in the transmitted character.
The receiver must be programmed to check the same format.
LCR BIT-5 = logic 0, parity is not forced (default).
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 0, parity bit is forced to a logical 1 for the transmit and receive
data.
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 1, parity bit is forced to a logical 0 for the transmit and receive
data.
Logic 0 = No TX break condition (default).
Logic 1 = Forces the transmitter output (TX) to a “space”, logic 0, for alerting the remote receiver of a line
break condition.
Table 14
LCR B
for parity selection summary below.
X
0
0
1
1
BIT-2
IT
0
1
1
-5 LCR B
T
X
0
1
0
1
W
ABLE
ORD LENGTH
IT
5,6,7,8
-4 LCR B
6,7,8
14: P
5
0
1
1
1
1
ARITY SELECTION
IT
36
-3
Force parity to space, “0”
Force parity to mark, “1”
S
P
TOP BIT LENGTH
(B
ARITY SELECTION
1 (default)
Even parity
Odd parity
IT TIME
No parity
1-1/2
2
(
S
))
3.3V PCI BUS DUAL UART
XR17L152
REV. 1.1.0