sc16is762ipw NXP Semiconductors, sc16is762ipw Datasheet - Page 25

• Manufacturer Part Number: sc16is762ipw
• Description: Dual Uart With I2c-bus/spi Interface, 64 Bytes Of Transmit And Receive Fifos, Irda Sir Built-in Support
• Manufacturer: NXP Semiconductors

NXP Semiconductors
SC16IS752_SC16IS762_6
Product data sheet
Table 15.
Table 16.
Table 17.
Table 18.
Bit
5
4
3
2
1:0
LCR[5]
X
0
0
1
1
LCR[2]
0
1
1
LCR[1]
0
0
1
1
Symbol
LCR[5]
LCR[4]
LCR[3]
LCR[2]
LCR[1:0]
Line Control Register bits description
LCR[5] parity selection
LCR[2] stop bit length
LCR[1:0] word length
Word length (bits)
5, 6, 7, 8
5
6, 7, 8
LCR[0]
0
1
0
1
LCR[4]
X
0
1
0
1
Rev. 06 — 19 December 2006
Dual UART with I
Description
Set parity. LCR[5] selects the forced parity format (if LCR[3] = logic 1).
Parity type select.
Parity enable.
Number of Stop bits. Specifies the number of stop bits.
Word length bits 1, 0. These two bits specify the word length to be
transmitted or received (see
logic 0 = parity is not forced (normal default condition).
LCR[5] = logic 1 and LCR[4] = logic 0: parity bit is forced to a logical 1
for the transmit and receive data.
LCR[5] = logic 1 and LCR[4] = logic 1: parity bit is forced to a logical 0
for the transmit and receive data.
logic 0 = odd parity is generated (if LCR[3] = logic 1)
logic 1 = even parity is generated (if LCR[3] = logic 1)
logic 0 = no parity (normal default condition)
logic 1 = a parity bit is generated during transmission and the receiver
checks for received parity
0 to 1 stop bit (word length = 5, 6, 7, 8)
1 to 1.5 stop bits (word length = 5)
1 = 2 stop bits (word length = 6, 7, 8)
Word length (bits)
5
6
7
8
LCR[3]
0
1
1
1
1
Parity selection
no parity
odd parity
even parity
forced parity ‘1’
forced parity ‘0’
Stop bit length (bit times)
1
1
2
1
2
2
SC16IS752/SC16IS762
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
…continued
Table
18).
© NXP B.V. 2006. All rights reserved.
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