wm8940gefl-v Wolfson Microelectronics plc, wm8940gefl-v Datasheet - Page 60
wm8940gefl-v
Manufacturer Part Number
wm8940gefl-v
Description
Mono Codec With Speaker Driver
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8940GEFL-V.pdf
(87 pages)
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WM8940
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GENERAL PURPOSE INPUT/OUTPUT
Figure 32 A-Law Companding
In 2-wire mode, the CSB pin is not required and it can be used as a GPIO pin. In 3 wire mode,
the MODE / GPIO can be configured as a GPIO by setting the MODE_GPIO register bit
Whichever pin is used for GPIO, it is controlled from the GPIO control register R8. The GPIOSEL bits
allow the chosen pin to be configured to perform a variety of useful tasks as shown in Table 57.
Note that SLOWCLKEN must be enabled when using the jack detect function.
Table 52 CSB/GPIO Control
R8
GPIO
control
REGISTER
ADDRESS
120
100
80
60
40
20
0
0
5:4
3
2:0
BIT
0.2
OPCLKDIV
GPIOPOL
GPIOSEL
LABEL
A-law Companding
0.4
Normalised Input
00
0
000
DEFAULT
0.6
PLL Output clock division ratio
00=divide by 1
01=divide by 2
10=divide by 3
11=divide by 4
GPIO Polarity invert
0=Non inverted
1=Inverted
CSB/GPIO pin function select:
000=CSB input
001= Jack insert detect
010=Temp ok
011=Amute active
100=SYSCLK clock o/p
101=PLL lock
110=Reserved
111=Reserved
0.8
DESCRIPTION
PD, Rev 4.2, April 2008
1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
Production Data
60
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