wm8594seft-v Wolfson Microelectronics plc, wm8594seft-v Datasheet - Page 11
wm8594seft-v
Manufacturer Part Number
wm8594seft-v
Description
24-bit 192khz 2vrms Multi-channel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8594SEFT-V.pdf
(80 pages)
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Production Data
Notes:
1.
2.
3.
MASTER CLOCK TIMING
Figure 1 MCLK Timing
Table 1 Master Clock Timing Requirements
/RESET TIMING
Figure 2 /RESET Timing
Table 2 /RESET Timing Requirements
w
Test Conditions
AVDD1, DVDD = 3.3V, AVDD2 = 9V, AGND1, AGND2, DGND = 0V, T
PARAMETER
Master Clock Timing Information
MCLK System clock cycle time
MCLK Duty cycle
MCLK Period Jitter
MCLK Rise/Fall times
Test Conditions
AVDD1, DVDD = 3.3V, AVDD2 = 9V, AGND1, AGND2, DGND = 0V, T
PARAMETER
/RESET Timing Information
/RESET pulsewidth low
ADCMCLK/
DACMCLK1/
DACMCLK2
All minimum and maximum values are subject to change.
This resistance is selectable using VMID_SEL[1:0] – see Figure 52 for full details.
See p77 for details of extended input impedance configuration.
t
MCLKY
SYMBOL
SYMBOL
T
t
MCLKY
RESET
A
A
= +25
= +25
O
O
40:60
C
MIN
C
MIN
27
10
TYP
TYP
60:40
MAX
MAX
120
200
PD Rev 4.1 July 2008
10
WM8594
UNIT
UNIT
ns
ps
ns
ns
%
11
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