wm8594seft-v Wolfson Microelectronics plc, wm8594seft-v Datasheet - Page 23

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wm8594seft-v

Manufacturer Part Number
wm8594seft-v
Description
24-bit 192khz 2vrms Multi-channel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet
Production Data
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RIGHT JUSTIFIED (RJ) MODE
Figure 15 RJ Mode Timing
DSP MODE A
In DSP Mode A, the MSB of channel 1 left data input is sampled on the second rising edge of bit
clock following a left/right clock rising edge. Channel 1 right data then follows. The MSB of output
data changes on the first falling edge of bit clock following a left/right clock transition and may be
sampled on the rising edge of bit clock. The right channel data is contiguous with the left channel
data.
Figure 16 DSP Mode A Timing
In RJ mode the LSB of input data is sampled on the rising edge of bit clock preceding a left/right
clock transition. The LSB of output data changes on the falling edge of bit clock preceding a
left/right clock transition, and may be sampled on the next rising edge of bit clock. Left/right clock is
high during the left channel audio data samples and low during the right channel audio data
samples.
PD Rev 4.1 July 2008
WM8594
23

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