wm9705seft-v Wolfson Microelectronics plc, wm9705seft-v Datasheet
![no-image](/images/no-image-200.jpg)
wm9705seft-v
Related parts for wm9705seft-v
wm9705seft-v Summary of contents
Page 1
... MASTER VOL POP (Reg 02h) (Reg 20h) MIX (Reg 20h) M (Reg 0Ah) (Reg 0Ch MONO VOL U (Reg 06h) X PSEL (Reg 5Ch) VREF Production Data, July 2008, Rev 4.5 Copyright ©2008 Wolfson Microelectronics plc 16 / 32Ohm headphone HPOUTL HPOUTR HPGND LINEOUTL LINEOUTR MONO_OUT (TX) VREFOUT ...
Page 2
WM9705 DESCRIPTION ............................................................................................................1 FEATURES..................................................................................................................1 APPLICATIONS ..........................................................................................................1 BLOCK DIAGRAM ......................................................................................................1 TABLE OF CONTENTS ..............................................................................................2 ORDERING INFORMATION .......................................................................................4 ABSOLUTE MAXIMUM RATINGS..............................................................................4 RECOMMENDED OPERATING CONDITIONS ..........................................................5 PIN CONFIGURATION................................................................................................6 PIN DESCRIPTION .....................................................................................................7 POWER CONSUMPTION .........................................................................................12 DETAILED TIMING DIAGRAMS ...............................................................................13 AC-LINK LOW POWER MODE .........................................................................................13 ...
Page 3
WM9705 PEN DIGITISER OPERATION ..................................................................................40 TIMING OF PEN DIGITISER OPERATIONS.....................................................................41 CONTROL OF PEN DIGITISER FUNCTIONS ..................................................................41 READBACK OF PEN DIGITISER RESULTS.....................................................................42 CONVERSION CONTROL ................................................................................................43 PRESSURE MEASUREMENT ..........................................................................................48 MASK FUNCTION .............................................................................................................49 STANDBY OPERATION AND WAKE-UP..........................................................................50 AUXILIARY CONVERSIONS.............................................................................................51 PACKAGE DIMENSIONS - TQFP.............................................................................53 ...
Page 4
... WM9705 ORDERING INFORMATION TEMPERATURE DEVICE RANGE o WM9705SEFT/V - WM9705SEFT/RV - TEMPERATURE DEVICE RANGE o WM9705SEFL/V - WM9705SEFL/RV - Note: Reel quantity = 2,200 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits ...
Page 5
WM9705 RECOMMENDED OPERATING CONDITIONS PARAMETER Digital supply range Analogue supply range Digital ground Analogue ground Difference AGND to DGND – Note 1 Difference AVDD to DVDD – Note 2 Note: 1. AGND is normally the same as DGND and HPGND ...
Page 6
WM9705 PIN CONFIGURATION DVDD1 XTLIN XTLOUT DGND1 SDATAOUT BITCLK DGND2 SDATAIN DVDD2 SYNC RESETB PCBEEP Figure 1 TQFP Pinout DVDD1 XTLIN XTLOUT DGND1 SDATAOUT BITCLK DGND2 SDATAIN DVDD2 SYNC RESETB PCBEEP Figure 2 QFN Pinout ...
Page 7
WM9705 PIN DESCRIPTION PIN 48 PIN QFN 48 PIN TQFP 1 DVDD1 DVDD1 2 XTLIN XTLIN 3 XTLOUT XTLOUT 4 DGND1 DGND1 SDATAOUT SDATAOUT 5 6 BITCLK BITCLK 7 DGND2 DGND2 8 SDATAIN SDATAIN 9 DVDD2 DVDD2 SYNC SYNC 10 ...
Page 8
WM9705 Electrical characteristics Test Characteristics: AVDD = 3.3V, DVDD = 3.3V, 48kHz audio sampling, T PARAMETER Digital Logic Levels (DVDD = 3.3V) Input LOW level Input HIGH level Output LOW Output HIGH Analogue Audio I/O Levels (Input Signals on any ...
Page 9
WM9705 Test Characteristics: AVDD = 3.3V, DVDD = 3.3V, 48kHz audio sampling, T PARAMETER Mixer Inputs to Line-out (10kΩ load) Maximum input voltage Maximum output voltage Signal to Noise Ratio A-weighted (Note 2) Total Harmonic Distortion + Noise -1dBfs input ...
Page 10
WM9705 Test Characteristics: AVDD = 3.3V, DVDD = 3.3V, MCLK = 24.576MHz, T PARAMETER PEN and AUXILIARY INPUT ADC Resolution Differential non-linearity error Integral non-linearity error Offset error Gain error Noise Conversion time Acquisition time Throughput rate Multiplexer settling time ...
Page 11
WM9705 Figure 3 Distortion Versus Power on Headphone Outputs, using 32 Ω Load and AVDD = HPVDD = 3.3V w -100 -90 -80 -70 -60 -50 -40 Output Power (mW) - Production Data ...
Page 12
WM9705 POWER CONSUMPTION MODE DESCRIPTION Record and Playback Mic Record (note Other Input Record 0 0 Other Input Record 0 0 PR6 Other Input Record 0 0 PR6 and PR2 Other Input Record 0 0 PR6 and ...
Page 13
WM9705 DETAILED TIMING DIAGRAMS Test Characteristics: AVDD = 3.3V, DVDD = 3.3V, AGND = 0V …………..T All measurements are taken at 10% to 90% DVDD, unless otherwise stated. All the following timing information is guaranteed, not tested. AC-LINK LOW POWER ...
Page 14
WM9705 WARM RESET BITCLK Figure 6 Warm Reset Timing SYNC active high pulse width SYNC inactive to BITCLK startup delay CLOCK SPECIFICATIONS BITCLK Figure 7 Clock Specifications (50pF External Load) PARAMETER BITCLK frequency BITCLK period BITCLK output jitter BITCLK high ...
Page 15
WM9705 DATA SETUP AND HOLD (50PF EXTERNAL LOAD) Figure 8 Data Setup and Hold (50pF External Load) Note: Setup and hold time parameters for SDATAIN are with respect to AC’97 Controller. PARAMETER Setup to falling edge of BITCLK Hold from ...
Page 16
WM9705 DEVICE DESCRIPTION INTRODUCTION This specification describes the WM9705 audio codec, which is designed to be software and hardware compatible with the Intel AC’97 rev2.2 component specification. The device is a derivative of the basic AC’97 codec, with added support ...
Page 17
WM9705 NON - AC’97 FEATURES In addition to the AC’97 features offered, WM9705 also supports: 4-wire pen digitiser with integrated screen driver, featuring highly flexible modes of operation, supporting autonomous screen conversions, and auxiliary conversions. Screen X and Y connections ...
Page 18
WM9705 Figure 10 Functional Block Diagram w Reg 14h b15 Reg 16h b15 Production Data PD Rev 4.5 July 2008 18 ...
Page 19
WM9705 PEN DIGITIZER AND AUXILIARY ADC A 4 wire input pen digitiser function is included on WM9705. This circuit comprises driver circuits to drive typical resistive touch screens of the type used on PDA’s, plus a 12 bit resolution ADC ...
Page 20
WM9705 enhancement applied. It can also be bypassed if desired. This function is enabled by setting the bit POP in Register 20h. VARIABLE SAMPLE RATE SUPPORT The DACs and ADCs on this device support all the recommended sample rates specified ...
Page 21
WM9705 SPEN STATE AT CODEC ID (PIN 45 STRAPPING) START-UP ‘lo’ (rev2.2 compliant) ‘hi’ primary ‘lo’ (rev2.2 compliant) ‘lo’ secondary ‘hi’ (WM proprietary) ‘hi’ primary ...
Page 22
WM9705 When a headphone is connected the low impedance to ground of the headset pulls down the DC level to near ground headset with microphone is plugged in, the high impedance of the microphone does not pull down ...
Page 23
WM9705 DATA SLOT MAPPING DAC data and SPDIF data sent to the device, ADC data sent from the device, can be optionally mapped into alternative slots under control of slot mapping bits located as follows: SLOT MAPPING DATA DAC data ...
Page 24
WM9705 TAG PHASE SYNC 12.288MHz 81.4nS BITCLK VALID SDATAOUT SLOT(1) SLOT(2) FRAME TIME SLOT 'VALID' BITS END OF PREVIOUS ('1' = TIME SLOT CONTAINS AUDIO FRAME VALID PCM DATA) Figure 12 AC-link Audio Output Frame The datastreams currently defined by ...
Page 25
WM9705 AC-LINK AUDIO OUTPUT FRAME (SDATAOUT) The audio output frame data streams correspond to the multiplexed bundles of all digital output data targeting the WM9705’s DAC inputs, and control registers. As briefly mentioned earlier, each audio output frame supports up ...
Page 26
WM9705 SLOT 1: COMMAND ADDRESS PORT The command port is used to control features, and monitor status for the WM9705 functions including, but not limited to, mixer settings, and power management (refer to the Serial Interface Register Map). The control ...
Page 27
WM9705 AC-LINK AUDIO INPUT FRAME (SDATAIN) TAG PHASE SYNC 12.288MHz 81.4nS BITCLK CODEC SDATAIN SLOT(1) SLOT(2) READY TIME SLOT 'VALID' BITS END OF PREVIOUS ('1' = TIME SLOT CONTAINS AUDIO FRAME Figure 14 AC-link Audio Input Frame The audio input ...
Page 28
WM9705 A new audio input frame begins with a low to high transition of SYNC as shown in Figure 15. SYNC is synchronous to the rising edge of BITCLK. On the immediately following falling edge of BITCLK, the WM9705 samples ...
Page 29
WM9705 SLOTS 7 AND 8: These data slots may be utilised by the WM9705 to output audio data under control of the mapping bits ASS [1:0] in register 5Ch, allowing implementation of multi-channel systems. These slots may also be used ...
Page 30
WM9705 Within normal audio frames SYNC is synchronous to the WM9705 input. However, in the absence of BITCLK, SYNC is treated as an asynchronous input used in the generation of a warm reset to the WM9705. The WM9705 will not ...
Page 31
WM9705 Support for the MSB of the volume level is not provided by the WM9705. If the MSB is written to, then the WM9705 detects when that bit is set and sets all 4 LSBs to 1s. Example: If the ...
Page 32
WM9705 SR2 TO SR0 Table 11 Record Select Register Function RECORD GAIN REGISTERS (INDEX 1Ch) 1Ch sets the stereo input record gain with each step corresponding to 1.5dB. The MSB of the register is the mute bit. When this bit ...
Page 33
WM9705 When the AC-link Codec Ready indicator bit (SDATAIN slot 0, bit 15 indicates that the AC-link and the WM9705 control and status registers are in a fully operational state. The AC’97 controller must further probe ...
Page 34
WM9705 Figure 16 illustrates one example procedure complete Powerdown of the WM9705. From normal operation sequential writes to the Powerdown Register are performed to Powerdown the WM9705 a piece at a time. After everything has been shut ...
Page 35
WM9705 DATA BIT VRA DRA SPDIF VRM DSA0 DSA1 CDAC SDAC LDAC AMAP REV0 REV1 ID0 ID1 Table 16 Extended Audio ID Register DSA1, DSA0 Table 17 DAC Slot Mapping DAC slot mapping to slots 7 ...
Page 36
WM9705 back. Sample rate is entered in binary form to the appropriate register. Note sample rates should only be altered when the relevant DAC or ADC is powered ON. REGISTERS 3AH – SPDIF CONTROL REGISTER Register 3Ah is a read/write ...
Page 37
WM9705 CONTROL BIT AMUTE HSCP MPUEN MHPZ PSEL HSDT HSEN HPND AMEN ADCNDAC ADCO HPF HSCMP ASS1 ASS0 Table 21 Vendor Specific Control Register 5Ch AMUTE indicates automute state has been detected. This is a read-only bit. ...
Page 38
WM9705 ASS1, ASS0 Table 22 ADC Slot Mapping Control VENDOR SPECIFIC GAIN CONTROL REGISTER (INDEX 72h) This register controls the gain and mute functions applied to the mixer path. This PGA is not accommodated in the ...
Page 39
WM9705 SERIAL INTERFACE REGISTER MAP The following table shows the function and address of the various control bits that are loaded and read through the serial interface. Reg Name D15 D14 D13 00h Reset X SE4 SE3 02h Master volume ...
Page 40
WM9705 PEN DIGITISER OPERATION The pen digitiser function comprises a 12 bit successive approximation ADC, with a multi-channel input multiplexor to select which signal to convert, and a switching matrix to control driving of signals to the resistive touchscreen plates. ...
Page 41
WM9705 TIMING OF PEN DIGITISER OPERATIONS Timing of pen digitiser operations is linked to the AC link frame timing. A single ADC conversion takes one frame to complete, including taking a sample, converting it, and passing it into the register ...
Page 42
WM9705 INDEX 78H – DIGITISER CONTROL WORD 2 – READ/WRITE REGISTER BIT LOCATION PRP[1:0] 15:14 RPR 13 PDEN 12 PINV 11 BSEN 10 BINV 9 WAIT 8 PIL 7 PHIZ 6 MSK[1:0] 5:4 PDD[3:0] 3:0 INDEX 7AH – DIGITISER DATA ...
Page 43
WM9705 ADR[2-0] 000 001 010 011 100 101 110 111 Table 24 Conversion Address to Channel Map If BUSY flag is enabled (BSEN bit in reg 78h set ‘1’) then the BUSY pin will remain high until the conversion in ...
Page 44
WM9705 POLLING METHOD The polling method relies on the controller to instruct every operation, i.e. to send an instruction requesting every individual conversion specifically. A polled conversion is requested by writing POLL bit 15 in register 76h, ...
Page 45
WM9705 Different types of polled conversion with delay set frame) SYNC Poll = 1, Coord = 0, ADR = 001 ( 0x76 = 0x9000 ) = X Measurement Write to 0x76 SDOUT with 0x9000 POLL Screen Switch ...
Page 46
WM9705 CONTINUOUS METHOD The continuous method of conversion allows for an autonomous free running operation of the digitiser, converting pen X,Y results and either pressure or AUX channels continuously at a pre- set rate. This removes from the controller the ...
Page 47
WM9705 Different types of continuous conversion with delay set frames) CTC = 1, CC=11, Coord = 0, ADR = 001 ( 0x76 = 0x1700 ) = X Measurement every 64 AC Link Frames SYNC Conversion 1 ADC ...
Page 48
WM9705 BUSY SIGNAL The BUSY signal is derived from the pen state machine and is an indication of the AUXADC being active on a conversion cycle. When an AUXADC conversion is requested BUSY will go high 61 BCLKs after the ...
Page 49
WM9705 MASK FUNCTION It is anticipated that sources of glitch noise such as LCD ‘invert’ signals will likely be picked up by the touchscreen plates and affect measurement accuracy. In order to minimise this effect, a signal may be applied ...
Page 50
WM9705 PDD[3-0] 0000 0001 0010 0011 0100 0101 0110 0111 Table 29 Pen Detect Comparator Threshold Figure 25 shows the pen detection function schematically. Figure 25 Pen Detection Configuration STANDBY OPERATION AND WAKE-UP WM9705 allows for complete zero power standby ...
Page 51
WM9705 Setting PRP[1: will power off the digitiser and and pen down detection. PENDET will not toggle on pen down. Provision of the PENDET flag as well as the the AC link wake up procedure allows controllers that ...
Page 52
WM9705 RECOMMENDED EXTERNAL COMPONENTS AVDD AC-LINK Y+ TouchScreen X- Y- MASTER MODE Direct battery measurement (6.5V max) LAYOUT NOTES C6, C20, C23 and C24 should be placed as close as possible to the relevant WM9705 connecting pin ...
Page 53
WM9705 PACKAGE DIMENSIONS - TQFP FT: 48 PIN TQFP ( 1.0 mm Dimensions Symbols (mm) MIN NOM A ----- ----- A 0.05 ----- 1 A 0.95 1.00 ...
Page 54
WM9705 PACKAGE DIMENSIONS - QFN FL: 48 PIN QFN PLASTIC PACKAGE EXPOSED 6 GROUND PADDLE BOTTOM VIEW (A3) SIDE VIEW C SEATING PLANE W (A3 Exposed lead Half etch tie ...
Page 55
... WM9705 IMPORTANT NOTICE Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice ...