wm9705seft-v Wolfson Microelectronics plc, wm9705seft-v Datasheet - Page 46

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wm9705seft-v

Manufacturer Part Number
wm9705seft-v
Description
Multimedia Ac?97 Codec With Integrated Touch Screen Controller
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM9705
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CONTINUOUS METHOD
The continuous method of conversion allows for an autonomous free running operation of the
digitiser, converting pen X,Y results and either pressure or AUX channels continuously at a pre-
set rate. This removes from the controller the overhead associated with instructing which
conversion to do next etc. Continuous conversion is enabled by setting the CTC bit in register
76h. The rate of operation of the conversion sequence is set by writing bits CR0/1 into register
76h. These set the sequence rate as follows:
Table 26 Conversion Rate
Note that this rate is the MAXIMUM that may be obtained. In practice the rate will typically be
slower, if the number of conversions to be performed, and the delay applied by the DEL[3-0] bits
to each conversion, add up to a time greater than the nominal period for conversion set above.
Likewise, if conversions are halted by pen going up, or MASK being applied, then this conversion
rate will not be met. If MSK[1,0] is set to 11, then the conversion rate becomes synchronised to
the rate of application of edges to the MASK input. The CR[1,0] value is ignored. Conversions are
performed after the edge on the MASK pin, delayed by the value set in the DEL [3-0] register.
Normal operation will be to perform X,Y screen drives, and conversions, followed by a pressure or
AUX conversion if requested by setting the appropriate address in the ADR[2-0] bits of register
76h. So long as the ADR[2-0] value remains set to auxiliary or pressure inputs, X,Y and the extra
auxiliary conversions will be made in every cycle.
Pen-down detection is performed after completion of each set of conversions and the output sent
to the PENDET pin, and output in bit 15 of the data read-back word. If the PDEN bit is left at the
default value ‘0’, if pen-down is not detected, then the continuous conversion process including
driving the screen, will continue anyway. If the PDEN bit is set to ‘1’, and a pen-down is NOT
detected, then the conversion process will come to a stop, until the pen is once more returned to
the screen. DEL[3-0] delays are applied as for polled operation to all conversions.
Once a conversion is complete, the result is written into the results register 7Ah where it is
available for readback. Additionally the results may be output into a chosen SLOT by enabling slot
readback bit SLEN in register 76h and selecting the desired slot by setting SLT[2-0].
0
0
1
1
CR1
0
1
0
1
CR0
93.75Hz or 512 AC link frames
187.5Hz or 256 AC link frames
375Hz or 128 AC link frames
750Hz or 64 AC link frames
CONVERSION RATE
PD Rev 4.5 July 2008
Production Data
46

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