wm9705seft-v Wolfson Microelectronics plc, wm9705seft-v Datasheet - Page 33
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wm9705seft-v
Manufacturer Part Number
wm9705seft-v
Description
Multimedia Ac?97 Codec With Integrated Touch Screen Controller
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM9705SEFT-V.pdf
(55 pages)
WM9705
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When the AC-link Codec Ready indicator bit (SDATAIN slot 0, bit 15) is a 1 it indicates that the
AC-link and the WM9705 control and status registers are in a fully operational state. The AC’97
controller must further probe this Powerdown Control/Status Register to determine exactly which
subsections, if any, are ready.
Note that the normal default condition of WM9705 when RESETB is applied is ‘all active’.
However, if pin MASK is pulled ‘hi’ during RESETB active, all PR bits are overridden and the
device enters a low power mode. This allows a low power standby mode to be entered without
writing to the device, a condition that is desirable for example, if batteries are changed in a PDA.
The state of the MASK pin is latched on the rising edge of RESETB and if MASK is ‘hi’ then the
WM9705 will remain in low power mode until register 26h is written to.
Table 14 Powerdown Status Register Function
The Powerdown modes are as follows. The first three bits are to be used individually rather than
in combination with each other. The last bit PR3 can be used in combination with PR2 or by itself.
PR0 and PR1 control the PCM ADCs and DACs only. PR6 powers down just the stereo Line
Level output headphone amps on pins 39/41.
The WM9705 also includes a low power DAC to headphone mode, whereby resetting PR1and
PR6 enables the DAC and the path from the DAC to HPOUTL/R without having to power up the
main mixer (PR2). The POP bit (reg 20h) also needs to be set for this mode. The headphone
amplifier on the MONO output pin in not powered down by PR6, rather by PR2 or alternatively
may be enabled by setting MONOEN in register 74h.
Table 15 Powerdown Control Register Function
Figure 16 An Example of the WM9705 Powerdown/Powerup Flow
WRITE BIT
PR0
PR1
PR2
PR3
PR4
PR5
PR6
EAPD
READ BIT
DAC
ADC
REF
ANL
NORMAL
PR0 = 0 AND
ADC = 1
PR0 = 1
FUNCTION
VREFs up to nominal level
Analogue mixers, etc ready
DAC section ready to accept data
ADC section ready to transmit data
FUNCTION
PCM in ADCs and input Mux Powerdown
PCM out DACs Powerdown
Analogue mixer Powerdown
(VREF still on)
Analogue mixer Powerdown (VREF off)
Digital interface (AC-link) Powerdown
(external clock off)
Internal clock disable
HP amp Powerdown
External amplifier Powerdown
READY = 1
ADCs OFF
PR0
PR1 = 0 AND
DAC = 1
PR1 = 1
DACs OFF
PR1
PR2 = 0 AND
ANL = 1
DEFAULT
PR2 = 1
OFF PR2 OR
ANALOGUE
PR3
PR4 = 1
COLD RESET
DIGITAL I/F
OFF PR4
RESET
WARM
PD Rev 4.5 July 2008
Production Data
CODA LINK
SHUT OFF
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