isppac-powr1014 Lattice Semiconductor Corp., isppac-powr1014 Datasheet - Page 46

• Manufacturer Part Number: isppac-powr1014
• Description: In-system Programmable Power Supply Supervisor, Reset Generator And Sequencing Controller
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Technical Support Assistance
Hotline: 1-800-LATTICE (North America)
e-mail:
Internet: www.latticesemi.com
Revision History
October 2006
February 2006
August 2007
March 2006
March 2007
June 2008
May 2006
Date
[phone] (Outside North America)
[e-mail]
Version
01.0
01.1
01.2
01.3
01.4
01.5
01.6
Initial release.
ispPAC-POWR1014/A block diagram:
Pin Descriptions table: “InxP” changed to “Inx”, “MONx” to “VMONx”, VMON upper range
from “5.75V” to “5.87V”.
Pin Descriptions table, note 4 - clarification for un-used VMON pins to be tied to GNDD.
Absolute Maximum Ratings table and Recommended Operating Conditions table:
“VMON+” changed to VMON”.
Digital Specifications table: add note # 2 to ISINKTOTAL: “Sum of maximum current sink
by all digital outputs. Reliable operation is not guaranteed if this value is exceeded.”
Typographical corrections: Vmon trip points and thresholds
Typographical corrections: “InxP” to “Inx”, “MONx” to “VMONx”.
Update HVOUT I source range: 12.5µA to 100µA
Clarify operation of ADC conversions
Digital Specifications table, added footnotes on I
TAP Instructions table, clarify DISCHARGE instruction of JTAG. Added instruction descrip-
tions for others.
Data sheet status changed to “Final”
Analog Specifications table, reduced Max. I
Tightened Input Resistor Variation to 15%.
AC/Transient Characteristics table, tightened Internal Oscillator frequency variation down
to 5%.
Digital Specifications table, included V
Corrected VCCINP Voltage range from "2.25V to 3.6V" to "2.25V to 5.5V".
Removed reference to Internal Pull-up resistor for signal line TDO.
Corrected the Maximum Vmon Range value from 5.734V to 5.867V.
Removed references to VPS[0:1].
Changes to HVOUT pin specifications.
Added timing diagram and timing parameters to "Power-On Reset" specifications.
Modified PLD Architecture figure to show input registers.
Updated I
V
CCPROG
2
pin usage clarification added.
C Control Registers table.
2-46
Change Summary
IL
and V
“SELTDI” changed to “TDISEL”.
ispPAC-POWR1014/A Data Sheet
CC
IH
to 20 mA.
2
specifications for I
C frequency
2
C interface.