gs8160e32bt-250v GSI Technology, gs8160e32bt-250v Datasheet - Page 11

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gs8160e32bt-250v

Manufacturer Part Number
gs8160e32bt-250v
Description
1m X 18, 512k X 32, 512k X 36 18mb Sync Burst Srams
Manufacturer
GSI Technology
Datasheet
Notes:
1.
2.
3.
Rev: 1.01 5/2006
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from Read cycles to Write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
Transitions shown in gray tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
X
X
CW
First Write
Burst Write
Simplified State Diagram with G
W
W
CW
11/23
W
CR
R
CR
R
Deselect
X
CW
W
CW
W
R
CR
First Read
Burst Read
R
R
CR
X
X
GS8160ExxBT-xxxV
© 2004, GSI Technology
Preliminary

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