hsp50210 Intersil Corporation, hsp50210 Datasheet - Page 48

• Manufacturer Part Number: hsp50210
• Description: Digital Costas Loop
• Manufacturer: Intersil Corporation

AC Electrical Specifications
NOTES:
AC Test Load Circuit
†
11. AC tests performed with C
12. Controlled via design or process parameters and not directly tested. Characterized upon initial design and after major process and/or design
13. Set up time required to ensure action initiated by WR or SERCLK will be seen by a particular CLK.
Hold Time ISER, QSER, SSYNC FROM SERCLK
Setup Time A0-2, C0-7 to Rising Edge of WR
Hold Time A0-2, C0-7 from Rising Edge of WR
WR to CLK
SERCLK to CLK
CLK to AOUT9-0, BOUT9-0, COF, COFSYNC, SOF, SOFSYNC,
SMBLCLK, HI/LO, SLOCLK, LKINT, THRES
Read Address Low to Data Valid
CLK to Status Out on C0-7
WR High
WR Low
RD Low
RD LOW to Data Valid
RD HIGH to Output Disable
Output Enable
Output Disable Time
Output Rise, Fall Time
Test head capacitance.
Test V
changes.
IH
= 3.0V, V
IHC
PARAMETER
= 4.0V, V
3-48
SWITCH S1 OPEN FOR I
L
= 40 pF, I
IL
= 0V.
V
CC
OL
DUT
= 2mA, and I
= 5.0V 5%, T
CCSB
C
OH
AND I
L
A
†
= 0
= -400mA. Input reference level for CLK is 2.0V, all other inputs 1.5V.
S1
CCOP
HSP50210
o
C to 70
SYMBOL
t
t
t
t
t
t
t
o
t
t
t
t
WRH
t
t
ADO
CDO
WRL
RDO
ROD
t
t
DSH
t
WH
WC
WS
DO
OD
C (Commercial), T
SC
OE
RF
RL
EQUIVALENT CIRCUIT
IOH
A
MIN
1.5V
15
15
10
16
16
16
0
0
= -40
-
-
-
-
-
-
-
-
o
C to 85
52MHz
IOL
o
C (Industrial), (Note 11) (Contin-
MAX
26
15
15
10
8
8
8
5
-
-
-
-
-
-
-
-
COMMENTS
ns, (Note 13)
ns, (Note 13)
ns, (Note 12)
ns, (Note 12)
ns, (Note 12)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns