ak4562 AKM Semiconductor, Inc., ak4562 Datasheet - Page 20
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ak4562
Manufacturer Part Number
ak4562
Description
Low Power 20bit Codec With Pga
Manufacturer
AKM Semiconductor, Inc.
Datasheet
1.AK4562.pdf
(29 pages)
ASAHI KASEI
MS0031-E-00
About zero crossing operation
value is changed by zero crossing timeout as zero crossing detection does not occur by a little offset of
comparator.
= 31H. And then the only Lch completed zero crossing, Rch is waiting for zero crossing detection, zero crossing
counter is reset when IPGA (OPGA) is newly written 32H, zero crossing operation starts toward IPGA (OPGA) =
32H in state Lch = 31H, Rch = 30H. Internal IPGA (OPGA) value in the AK4562 has the registers of L/R channels
independently, according to change IPGA (OPGA) value independently, IPGA (OPGA) value of L/R channels
may become a difference in level.
keeping the same value. When IPGA (OPGA) is finished by normal zero crossing timeout on IPGA (OPGA) value
of L/R channels does not give a difference in level, the change of IPGA (OPGA) should be written after zero
crossing timeout cycle and over.
Comparator for zero crossing detection in the AK4562 has offset. Therefore, it is a possible that IPGA (OPGA)
For example, when Lch and Rch are in the state of IPGA (OPGA) = 30H, both channels are set to IPGA (OPGA)
Therefore, if IPGA (OPGA) is written before zero crossing detection on zero crossing timeout, IPGA (OPGA) is
Internal zero crossing
operation completion flag
Lch Internal IPGA
Rch Internal IPGA
IPGA Register
(OPGA)
(OPGA)
(OPGA)
WR[IPGA(OPGA)=31H]
Reset zero crossing timer
30H
30H
30H
Figure 15. About Zero Crossing Operation
Zero crossing
31H
30H
31H
- 20 -
WR[IPGA(OPGA)=32H]
Reset zero crossing timer
32H
32H
32H
[AK4562]
2000/05