zl50118gag2 Zarlink Semiconductor, zl50118gag2 Datasheet - Page 76

• Manufacturer Part Number: zl50118gag2
• Description: 32 Channel 1 T1/e1 Cesop Processor With Single Ethernet Interface
• Manufacturer: Zarlink Semiconductor

12.4
The TDM Interface can be used to directly drive into a Line Interface Unit (LIU). The interface can work in this mode
with E1, DS1, J2, E3 and DS3. The frame pulse is not present, just data and clock is transmitted and received.
Table 28 shows timing for DS3, which would be the most stringent requirement.
TDM_TXCLK Period
TDM_TXCLK High
TDM_TXCLK Low
TDM_RXCLK Period
TDM_RXCLK High
TDM_RXCLK Low
TDM_TXDATA Output Delay
TDM_RXDATA Input Setup
TDM_RXDATA Input Hold
TDM LIU Interface Timing
TDM_RXDATA
TDM_TXDATA
TDM_RXCLK
TDM_TXCLK
Parameter
Table 28 - TDM - LIU Structured Transmission/Reception
Figure 31 - TDM-LIU Structured Transmission/Reception
Symbol
t
t
t
t
t
t
CRH
CTP
CTH
CRP
CRL
t
CTL
PD
t
t
S
H
ZL50115/16/17/18/19/20
t
Zarlink Semiconductor Inc.
S
Min.
6.7
6.7
9.0
9.0
3
6
3
t
t
CRP
CTP
76
22.353
22.353
Typ.
t
t
-
t
CTH
CRH
PD
t
H
Max.
10
t
t
CTL
CRL
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS3 clock
DS3 clock
Data Sheet
Notes