am79c30a Advanced Micro Devices, am79c30a Datasheet - Page 32
![no-image](/images/manufacturer_photos/0/0/14/advanced_micro_devices_sml.jpg)
am79c30a
Manufacturer Part Number
am79c30a
Description
Digital Subscriber Controller ?dsc ?circuit
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C30A.pdf
(101 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
am79c30a-JC
Manufacturer:
SPW
Quantity:
4 480
Company:
Part Number:
am79c30aJC
Manufacturer:
AMD
Quantity:
3 041
Company:
Part Number:
am79c30aJC/C
Manufacturer:
AMD
Quantity:
5 530
Company:
Part Number:
am79c30aJC/C
Manufacturer:
AMD
Quantity:
5 530
Company:
Part Number:
am79c30aJC/C
Manufacturer:
NS
Quantity:
5 120
processor that the MAP digital circuitry is functional.
Note that the digital patterns received after loopback
will not be identical to the transmitted patterns. The
D-D gain is approximately 2.5 dB.
MAP Digital Loopback 2
This loopback mode connects the analog D/A output
path to the analog A/D input path, internal to the DSC
circuit. The EAR and LS outputs and both AIN inputs
will be disabled. This mode allows verification from the
S Interface or microprocessor that the MAP analog and
digital circuitry are functional. The digital patterns re-
ceived after loopback will not be identical to the trans-
mitted patterns.
The bits in the MAP mode Register define the en-
able/disable options for the various MAP configurations
as follows.
MAP Registers
The MAP contains the programmable registers found in
Table 31.
Note:
It is necessary to complete any transfers to the multi-byte
MAP registers. For instance, a total of 16 bytes must be trans-
ferred to update the X filter.
32
MAP Register
X-filter Coefficient Register
R-filter Coefficient Register
GX-Gain Coefficient Register
GR-Gain Coefficient Register
GER-Gain Coefficient Register
Sidetone-Gain Coefficient Register
Frequency Tone Generator Register
Amplitude Tone Generator Register
MAP mode Registers (3)
Secondary Tone Ringer Amplitude
Reg
Secondary Tone Ringer Frequency
Reg
Transmit Peak Register
Receive Peak Register
Table 31. Map Registers
Bytes
16
16
2
2
2
2
2
2
1
1
1
1
1
Am79C30A/32A Data Sheet
Mnemonic
PEAKR
PEAKX
STGR
FTGR
ATGR
STRA
STRF
MMR
GER
GX
GR
X
R
Following reset, the MAP registers FTGR, MMR1,
MMR2, MMR3, STRA, and STRF all default to 00 hex.
All other MAP registers are not affected by reset and
must be programmed by the microprocessor before
being enabled. When the registers are disabled, or
after reset, the MAP will have the response shown in
Table 32.
Filter
X filter
R filter
GX filter
GR filter
GER filter
Sidetone gain
Table 32. Default Values
Default Response
Disabled (0 dB, Flat)
Disabled (0 dB, Flat)
Disabled (0 dB, Gain)
Disabled (0 dB, Gain)
Disabled (0 dB, Gain)
Disabled (–18 dB, Gain)