am79c30a Advanced Micro Devices, am79c30a Datasheet - Page 44
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am79c30a
Manufacturer Part Number
am79c30a
Description
Digital Subscriber Controller ?dsc ?circuit
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C30A.pdf
(101 pages)
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D-Channel Mode Register 4 — (DMR4) — Read/Write
Address = Indirect 8FH
Note:
The receiver and transmitter thresholds can only be changed when the Am79C30A/32A is in Idle mode.
Address Status Register — (ASR) — Read Only
Address = Indirect 91H
44
X
X
X
X
X
X
X
X
X
X
X
X
X
7
0
1
4–7
Bit
0
1
2
3
X
X
X
X
X
X
X
X
X
X
X
X
X
6
0
1
X
X
X
X
X
X
X
X
X
X
X
X
5
0
1
1
Logical 1
FRAR1/SRAR1 address recognized
FRAR2/SRAR2 address recognized
FRAR3/SRAR3 address recognized
FRAR4/SRAR4 address recognized
Reserved
X
X
X
X
X
X
X
X
X
X
X
X
X
4
0
1
Bit
X
X
X
X
X
X
3
X
X
X
X
0
0
1
1
X
X
X
X
X
X
X
X
X
X
X
X
2
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
1
0
0
1
1
Table 42. D-Channel Mode Register 4
0
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
Table 43. Address Status Register
Control
Interframe Fill
Receiver Threshold
Transmitter Threshold
Address Recognition
C/R Bit Compare
Am79C30A/32A Data Sheet
Logical 0 (Default Value)
No FRAR1/SRAR1 address match
No FRAR2/SRAR2 address match
No FRAR3/SRAR3 address match
No FRAR4/SRAR4 address match
Reserved
Function
1 byte (EFCR bit 0 = 0)
1 byte (EFCR bit 0 = 1)
2 bytes (EFCR bit 0 = 0)
16 bytes (EFCR bit 0 = 1)
4 bytes (EFCR bit 0 = 0)
24 bytes (EFCR bit 0 = 1)
8 bytes (EFCR bit 0 = 0)
30 bytes (EFCR bit 0 = 1)
1 byte (EFCR bit 0 = 0)
1 byte (EFCR bit 0 = 1)
2 bytes (EFCR bit 0 = 0)
6 bytes (EFCR bit 0 = 1)
4 bytes (EFCR bit 0 = 0)
10 bytes (EFCR bit 0 = 1)
8 bytes (EFCR bit 0 = 0)
14 bytes (EFCR bit 1 = 1)
Mark Idle (default value)
Flag Idle
2-byte (default value)
First Received Byte only
Second Received Byte only
Disable FRAR bit 1 compare (default value)
Enable FRAR bit 1 compare