s71gl128nb0 Meet Spansion Inc., s71gl128nb0 Datasheet - Page 53

• Manufacturer Part Number: s71gl128nb0
• Description: Stacked Multi-chip Product Mcp 512/256/128 Megabit 32/16/8 M X 16-bit Cmos 3.0 Volt-only Mirrorbittm Page-mode Flash Memory With 32 Megabit 2m X 16-bit Psram
• Manufacturer: Meet Spansion Inc.

June 14, 2004 S29GLxxxN_00_A4
than once into the buffer, the final data loaded for that address will be
programmed.
Once the specified number of write buffer locations have been loaded, the system
must then write the Program Buffer to Flash command at the sector address. Any
other address and data combination aborts the Write Buffer Programming oper-
ation.
monitoring the last address location loaded into the write buffer. DQ7, DQ6, DQ5,
and DQ1 should be monitored to determine the device status during Write Buffer
Programming.
The write-buffer programming operation can be suspended using the standard
program suspend/resume commands. Upon successful completion of the Write
Buffer Programming operation, the device is ready to execute the next command.
The Write Buffer Programming Sequence can be aborted in the following ways:
The abort condition is indicated by DQ1 = 1, DQ7 = DATA# (for the last address
location loaded), DQ6 = toggle, and DQ5=0. A Write-to-Buffer-Abort Reset com-
mand sequence must be written to reset the device for the next operation. Note
that the full 3-cycle Write-to-Buffer-Abort Reset command sequence is required
when using Write-Buffer-Programming features in Unlock Bypass mode.
Write buffer programming is allowed in any sequence. Note that the Secured Sil-
icon sector, autoselect, and CFI functions are unavailable when a program
operation is in progress. This flash device is capable of handling multiple write
buffer programming operations on the same write buffer address range without
intervening erases. For applications requiring an excessive number of such re-
peated write buffer programming operations, please contact your local Spansion
representative. Any bit in a write buffer address range cannot be pro-
grammed from “0” back to a “1.” Attempting to do so may cause the device
to set DQ5 = 1, or cause the DQ7 and DQ6 status bits to indicate the operation
was successful. However, a succeeding read will show that the data is still “0.”
Only erase operations can convert a “0” to a “1.”
Accelerated Program
The device offers accelerated program operations through the WP#/ACC pin.
When the system asserts V
ters the Unlock Bypass mode. The system may then write the two-cycle Unlock
Bypass program command sequence. The device uses the higher voltage on the
WP#/ACC pin to accelerate the operation. Note that the WP#/ACC pin must not
be at V
may result. WP# has an internal pullup; when unconnected, WP# is at V
Figure 3 illustrates the algorithm for the program operation. Refer to the Erase
and Program Operations–“AC Characteristics” section on page 80 section for pa-
rameters, and Figure 14 for timing diagrams.
Load a value that is greater than the page buffer size during the Number of
Locations to Program step.
Write to an address in a sector different than the one specified during the
Write-Buffer-Load command.
Write an Address/Data pair to a different write-buffer-page than the one se-
lected by the Starting Address during the write buffer data loading stage of
the operation.
Write data other than the Confirm Command after the specified number of
data load cycles.
HH
The device then begins programming. Data polling should be used while
for operations other than accelerated programming, or device damage
A d v a n c e
S29GLxxxN MirrorBit
HH
I n f o r m a t i o n
on the WP#/ACC pin, the device automatically en-
TM
Flash Family
IH
.
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