s71pl129ja0 Meet Spansion Inc., s71pl129ja0 Datasheet - Page 61

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s71pl129ja0

Manufacturer Part Number
s71pl129ja0
Description
Stacked Multi-chip Product Mcp Flash Memory And Psram 128 Megabit 8m X 16-bit Cmos 3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory With 64/32/16 Megabit 4m/2m/1m X 16-bit Pseudo-static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for
3. When reading write operation status bits, the system must always provide the bank address where the Embedded
June 4, 2004 S29PL129J_MCP_00_A0
Standard
Suspend
Mode
Erase
Mode
limits.“DQ5: Exceeded Timing Limits”
further details.
Algorithm is in progress. The device outputs array data if the system addresses a non-busy bank.
DQ3: Sector Erase Timer
Embedded Program Algorithm
Embedded Erase Algorithm
Erase-Suspend-
Read
Erase-Suspend-Program
change a “0” back to a “1.” Under this condition, the device halts the opera-
tion, and when the timing limit has been exceeded, DQ5 produces a “1.”
Under both these conditions, the system must write the reset command to return
to the read mode (or to the erase-suspend-read mode if a bank was previously
in the erase-suspend-program mode).
After writing a sector erase command sequence, the system may read DQ3 to de-
termine whether or not erasure has begun. (The sector erase timer does not
apply to the chip erase command.) If additional sectors are selected for erasure,
the entire time-out also applies after each additional sector erase command.
When the time-out period is complete, DQ3 switches from a “0” to a “1.” See also
“Sector Erase Command Sequence”
After the sector erase command is written, the system should read the status of
DQ7 (Data# Polling) or DQ6 (Toggle Bit I) to ensure that the device has accepted
the command sequence, and then read DQ3. If DQ3 is “1,” the Embedded Erase
algorithm has begun; all further commands (except Erase Suspend) are ignored
until the erase operation is complete. If DQ3 is “0,” the device accepts additional
sector erase commands. To ensure the command has been accepted, the system
software should check the status of DQ3 prior to and following each subsequent
sector erase command. If DQ3 is high on the second status check, the last com-
mand might not have been accepted.
Table 14
Status
shows the status of DQ3 relative to the other status bits.
A d v a n c e
Erase 
Suspended Sector
Non-Erase
Suspended Sector
Table 14. Write Operation Status
for more information.
I n f o r m a t i o n
S29PL129J for MCP
(Note
DQ7#
DQ7#
Data
DQ7
0
1
on page 49.
2)
No toggle
Toggle
Toggle
Toggle
Data
DQ6
(Note
Data
DQ5
0
0
0
0
1)
Data
DQ3
N/A
N/A
N/A
1
No toggle
(Note
Toggle
Toggle
Data
DQ2
N/A
2)
RY/BY#
0
0
1
1
0
61

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