am41dl16x4d Meet Spansion Inc., am41dl16x4d Datasheet - Page 24

• Manufacturer Part Number: am41dl16x4d
• Description: Stacked Multi-chip Package Mcp Flash Memory And Sram Am29dl16xd 16 Megabit 2 M X 8-bit/1 M X 16-bit Cmos 3.0 Volt-only, Simultaneous Operation Flash Memory And 4 Mbit 512 K X 8-bit/256 K X 16-bit Static Ram
• Manufacturer: Meet Spansion Inc.

and all internal program/erase circuits are disabled,
and the device resets to reading array data. Subse-
quent writes are ignored until V
The system must provide the proper signals to the
control pins to prevent unintentional writes when V
is greater than V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE#f
or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
CE#f and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE#f = V
the device does not accept commands on the rising
edge of WE#. The internal state machine is automati-
cally reset to reading array data on power-up.
COMMON FLASH MEMORY INTERFACE
(CFI)
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
IL
, CE#f = V
(Word Mode)
Addresses
10h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
11h
IH
or WE# = V
LKO
IL
.
and OE# = V
0051h
0052h
0059h
0002h
0000h
0040h
0000h
0000h
0000h
0000h
0000h
Data
IH
. To initiate a write cycle,
CC
is greater than V
IH
Table 12. CFI Query Identification String
during power up,
Query Unique ASCII string “QRY”
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
P R E L I M I N A R Y
Am41DL16x4D
LKO
CC
.
software algorithms to be used for entire families of
devices. Software support can then be device-inde-
pendent, JEDEC ID-independent, and forward- and
backward-compatible for the specified flash device
families. Flash vendors can standardize their existing
interfaces for long-term compatibility.
This device enters the CFI Query mode when the sys-
tem writes the CFI Query command, 98h, to address
55h in word mode (or address AAh in byte mode), any
time the device is ready to read array data. The sys-
tem can read CFI information at the addresses given
in Tables 12–15. To terminate reading CFI data, the
system must write the reset command. The CFI Query
mode is not accessible when the device is executing
an Embedded Program or embedded erase algorithm.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in Tables 12–15. The
system must write the reset command to return the de-
vice to the autoselect mode.
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the
World Wide We b at ht tp: //ww w. am d.co m/ prod -
ucts/nvd/overview/cfi.html. Alternatively, contact an
AMD representative for copies of these documents.
Description
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