am41dl16x4d Meet Spansion Inc., am41dl16x4d Datasheet - Page 5

• Manufacturer Part Number: am41dl16x4d
• Description: Stacked Multi-chip Package Mcp Flash Memory And Sram Am29dl16xd 16 Megabit 2 M X 8-bit/1 M X 16-bit Cmos 3.0 Volt-only, Simultaneous Operation Flash Memory And 4 Mbit 512 K X 8-bit/256 K X 16-bit Static Ram
• Manufacturer: Meet Spansion Inc.

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Temporary Sector/Sector Block Unprotect ............................. 50
Alternate CE#f Controlled Erase and Program Operations .... 52
SRAM Read Cycle .................................................................. 54
SRAM Write Cycle .................................................................. 56
Figure 22. Data# Polling Timings (During Embedded Algorithms).. 48
Figure 23. Toggle Bit Timings (During Embedded Algorithms)....... 49
Figure 24. DQ2 vs. DQ6.................................................................. 49
Figure 25. Temporary Sector/Sector Block Unprotect
Timing Diagram............................................................................... 50
Figure 26. Sector/Sector Block Protect and Unprotect
Timing Diagram............................................................................... 51
Figure 27. Flash Alternate CE#f Controlled Write (Erase/Program) Op-
eration Timings................................................................................ 53
Figure 28. SRAM Read Cycle—Address Controlled....................... 54
Figure 29. SRAM Read Cycle ......................................................... 55
Figure 30. SRAM Write Cycle—WE# Control ................................. 56
P R E L I M I N A R Y
Am41DL16x4D
Flash Erase And Programming Performance
Flash Latchup Characteristics. . . . . . . . . . . . . . . 59
Package Pin Capacitance . . . . . . . . . . . . . . . . . . 59
FLASH Data Retention . . . . . . . . . . . . . . . . . . . . . 59
SRAM Data Retention . . . . . . . . . . . . . . . . . . . . . 60
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 61
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 62
FLA069—69-Ball Fine-Pitch Grid Array 8 x 11 mm ............... 61
Revision A (October 24, 2001) ............................................... 62
Figure 31. SRAM Write Cycle—CE1#s Control ............................. 57
Figure 32. SRAM Write Cycle—UB#s and LB#s Control ............... 58
Figure 33. CE1#s Controlled Data Retention Mode....................... 60
Figure 34. CE2s Controlled Data Retention Mode......................... 60
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