k4t51043qb-gce6 Samsung Semiconductor, Inc., k4t51043qb-gce6 Datasheet - Page 8

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k4t51043qb-gce6

Manufacturer Part Number
k4t51043qb-gce6
Description
512mb B-die Ddr2 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
512Mb B-die DDR2 SDRAM
Notes:
1.
2.
3.
4.
Ball Locations (x8)
Pins B3 and A2 have identical capacitance as pins B7 and A8.
For a read, when enabled, strobe pair RDQS & RDQS are identical in function and timing to strobe pair DQS
& DQS and input masking function is disabled.
The function of DM or RDQS/RDQS are enabled by EMRS command.
VDDL and VSSDL are power and ground for the DLL. It is recommended that they are isolated on the device
from VDD, VDDQ, VSS, and VSSQ.
x8 package pinout (Top View) : 60ball FBGA Package
VDDQ
G
A
B
C
D
E
H
K
F
J
L
VDD
DQ6
DQ4
VDDL
VDD
Top View (See the balls through the Package)
VSS
1
NC
+
+
+
1
VSSQ
VREF
DQ1
RDQS
VSSQ
2
CKE
BA0
A10
A12
NU/
A3
A7
2
+ : Depopulated Ball
: Populated Ball
3
3
RDQS
DQ3
VDDQ
VSS
VSS
BA1
DM/
WE
NC
+
+
+
+
+
+
+
+
+
+
+
A1
A5
A9
4
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5
G
A
B
C
D
E
F
H
K
L
J
+
+
+
+
+
+
+
+
+
+
+
7
6
VSSDL
VSSQ
DQ2
VDDQ
DQS
RAS
CAS
A11
7
NC
A2
A6
8
8
DQ0
VSSQ
VSSQ
DQS
CK
CK
A13
9
CS
A0
A4
A8
+
+
+
9
VDDQ
VDDQ
DQ7
DQ5
VDD
VSS
VDD
ODT
Rev. 0.91 (Sep. 2003)
DDR2 SDRAM
Preliminary

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