mt18vddt12872phg-335 Micron Semiconductor Products, mt18vddt12872phg-335 Datasheet - Page 13
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mt18vddt12872phg-335
Manufacturer Part Number
mt18vddt12872phg-335
Description
1gb X72, Ecc, Pll 200-pin Ddr Sdram Sodimm
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT18VDDT12872PHG-335.pdf
(28 pages)
Table 12: I
DDR SDRAM devices only;
Notes: 1–5, 8, 10, 12, 46; notes appear on pages 16–19; 0 C
NOTE:
pdf: 09005aef81697898/source: 09005aef8169786e
DD18C128x72PHG.fm - Rev. A 10/04 EN
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
t
once per clock cyle; Address and control inputs changing once
every two clock cycles
OPERATING CURRENT: One device bank; Active-Read-Precharge;
Burst = 4
and control inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks
idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
t
once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank
active; Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device
bank; Active-Precharge;
DM and DQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One
device bank active; Address and control inputs changing once per
clock cycle; CK =
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
device bank active; Address and control inputs changing once per
clock cycle;
twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE
OPERATING CURRENT: Four bank interleaving READs (BL=4) with
auto precharge with,
and control inputs change only during Active READ, or WRITE
commands
RC (MIN);
CK MIN; CKE = HIGH; Address and other control inputs changing
a - Value calculated as one module rank in this operating condition, and all other module ranks in I
b - Value calculated reflects all module ranks in this operating condition.
;
t
RC =
t
CK =
t
CK =
t
RC (MIN);
DD
t
t
CK (MIN); DQ, DM and DQS inputs changing
CK (MIN); I
t
CK (MIN); DQ, DM, and DQS inputs changing
Specifications and Conditions – 1GB
t
IN
RC =
t
= V
RC = RAS (MAX);
t
CK =
t
CK =
t
t
REF
CK =
RC (MIN);
OUT
t
0.2V
for DQ, DQS, and DM
CK (MIN); CKE = (LOW)
t
= 0mA
CK (MIN); I
t
CK (MIN); CKE = LOW
t
CK =
t
CK =
OUT
t
t
t
CK (MIN); Address
REFC =
REFC = 7.8125µs
= 0mA; Address
t
CK (MIN); DQ,
t
RFC (MIN)
t
RC =
t
13
CK =
T
A
+70 C; V
SYMBOL
I
I
I
I
I
I
I
DD4W
I
I
DD3N
I
DD5A
I
I
200-PIN DDR SDRAM SODIMM
DD2P
DD3P
DD4R
DD2F
DD0
DD1
DD5
DD6
DD7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
a
a
b
b
a
b
b
b
b
a
b
a
DD
= V
1,215
1,485
1,530
1,620
5,220
3,690
-335
810
630
810
180
DD
90
90
Q = +2.5V ±0.2V
1GB (x72, ECC, PLL)
MAX
1,215
1,485
1,530
1,440
5,220
3,645
-262
810
630
810
180
90
90
©2004 Micron Technology, Inc. All rights reserved.
-26A/
1,080
1,350
1,350
1,260
5,040
3,195
-265
720
540
720
180
DD 2 P
90
90
(CKE LOW) Mode.
UNITS NOTES
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28,
21, 28,
20, 40
20, 40
20, 40
20, 42
24, 42
20, 41
42
43
42
20
9