mt9v112 Micron Semiconductor Products, mt9v112 Datasheet - Page 7

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mt9v112

Manufacturer Part Number
mt9v112
Description
1/6-inch Soc Vga Cmos Digital Image Sensor
Manufacturer
Micron Semiconductor Products
Datasheet

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Register Notation
this document:
• R<decimal address>:<address page>
• R<decimal address>
NOTE:
09005aef8154a39d/09005aef8175e6cc
MT9V112_2.fm- Rev. A 1/05 EN
The following register address notations are used in
Example: R9:0—Shutter width register in sensor
page (page 0). Used to uniquely specify a register.
Internal registers are grouped in three address spaces. Program R240 selects the desired address space.
V
DD
V
V
ST ANDBY
AA
DD
VAAPIX
Q/D
/D
/A
S
CLKIN
SCLK
DATA
GND
GND
GND
(Two-Wire Serial Interface Transactions)
+ Sensor control (gains, shutter, etc.)
.
. 1/6-inch optical format
. Auto black compensation
. Programmable analog gain
. Programmable exposure
. 10-bit ADC
. H/W context switch to/from preview
. Bayer RGB output
640H x 480V
Image Flow Processor
Auto exposure
Auto white balance
Flicker detect/avoid
Camera control:
Snapshots, flash, video, clip
Figure 2: Internal Registers Grouping
Sensor Core
Camera Control
Registers
Sensor Core
Figure 1: Functional Block Diagram
R[255:0]
Page 0
Control Bus
Color Pipeline
Interface Transactions)
(Two-Wire Serial
Registers
R[255:0]
T ransactions)
Control Bus
Page 1
Image Data
(Two-Wire Serial
7
Interface
Control Bus
Image Flow Processor
SOC VGA DIGITAL IMAGE SENSOR
Pixel Data
• 0x<2 digit hex address>
Example: R240—Page address register. Used when
the register address is global in all three pages or
when by context the address page is understood.
Example: 0xF0—Page address register. Used when
the register address is global in all three pages, or
when by context the address page is understood.
Micron Technology, Inc., reserves the right to change products or specificat ions wit hout not ice.
Image Flow Processor
Lens shading correction
Color interpolation
Filtered resize and zoom
Defect correction
Color correction
Gamma correction
Color conversion + formatting
Camera Control
Registers
Line Buffers
R[255:0]
Colorpipe
Page 2
SRAM
©2004 Micron Technology, Inc. All rights reserved.
PRELIMINARY
MT9V112
D
PIXCLK
FRAME_VALID
LINE_VALID
STROBE
OUT
[7:0]

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