saa5547ps NXP Semiconductors, saa5547ps Datasheet - Page 20
saa5547ps
Manufacturer Part Number
saa5547ps
Description
Saa550x; Saa554x Tv Microcontrollers With Closed Captioning Cc And On-screen Display Osd
Manufacturer
NXP Semiconductors
Datasheet
1.SAA5547PS.pdf
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Philips Semiconductors
2000 Feb 23
Pulse Width Modulator 6 Control Register (PWM6)
PW6E
PW6V5 to PW6V0
Pulse Width Modulator 7 Control Register (PWM7)
PW7E
PW7V5 to PW7V0
ROM Bank (ROMBK)
STBY
I
ADR6 to ADR0
GC
I
CR2 to CR0
ENSI
STA
STO
2
2
C-bus Slave Address Register (S1ADR)
C-bus Control Register (S1CON)
TV microcontrollers with Closed Captioning (CC)
and On-Screen Display (OSD)
BIT
activate this PWM (logic 1)
pulse width modulator high time
activate this PWM (logic 1)
pulse width modulator high time
Standby mode enabled (logic 1)
I
enable I
clock rate bits; CR<2:0>:
enable I
START flag. When this bit is set in slave mode, the hardware checks the I
and generates a START condition if the bus is free or after the bus becomes free.
If the device operates in master mode it will generate a repeated START
condition.
STOP flag. If this bit is set in a master mode a STOP condition is generated.
A STOP condition detected on the I
in slave mode in order to recover from an error condition. In this case no STOP
condition is generated to the I
SCL lines and switches to the not selected receiver mode. The STOP flag is
cleared by the hardware.
2
C-bus slave address to which the device will respond
000 = 100 kHz bit rate
001 = 3.75 kHz bit rate
010 = 150 kHz bit rate
011 = 200 kHz bit rate
100 = 25 kHz bit rate
101 = 1.875 kHz bit rate
110 = 37.5 kHz bit rate
111 = 50 kHz bit rate
2
2
C-bus general call address (logic 1)
C-bus interface (logic 1)
20
2
C-bus, but the hardware releases the SDA and
FUNCTION
2
C-bus clears this bit. This bit may also be set
Preliminary specification
SAA55xx
2
C-bus
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