w83c554f Winbond Electronics Corp America, w83c554f Datasheet - Page 46
w83c554f
Manufacturer Part Number
w83c554f
Description
System I/o Controller With Pci Arbiter & Ultradma/33 Ide Controller
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83C554F.pdf
(156 pages)
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W83C554F
System Architecture
3.14.5
PCI Master Abort
A Master Abort sequence is initiated by the W83C554F to abort its cycle if DEVSEL# is not asserted within four clocks after
FRAME# is asserted. This sequence is treated as a fatal error. Any IDE activity will be terminated immediately. An NMI
will be generated if programmed in register 40h, bit 0 (page 58.) The DMA Status Register's Abort and Error bits will be set.
The PCI Configuration Registers will not be cleared. The PCI Configuration Space Status Register's MA bit will also be set,
to indicate the W83C554F has terminated its transaction using a Master Abort cycle.
Figure 3-13. Master Abort
WINBOND ELECTRONICS CORP. AMERICA
44
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