w83c554f Winbond Electronics Corp America, w83c554f Datasheet - Page 99

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w83c554f

Manufacturer Part Number
w83c554f
Description
System I/o Controller With Pci Arbiter & Ultradma/33 Ide Controller
Manufacturer
Winbond Electronics Corp America
Datasheet

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Part Number
Manufacturer
Quantity
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Part Number:
W83C554F
Manufacturer:
Winbond
Quantity:
1 831
W83C554F
Initialization Command Word 4 Register
Function:
Type:
Bit Description:
WINBOND ELECTRONICS CORP. AMERICA
Bits [7:5]:
Bit 4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
Both interrupt controllers must have the Initialization Command Word 4 (ICW4) Register programmed
as part of their initialization sequence. At a minimum, bit 0 must be set to "1" to indicate it is operating
in an x86-based system.
Write Only
Reserved. These bits must be programmed to "000."
SFNM. Special Fully Nested Mode. This mode should normally be disabled by writing "0" to
this bit.
BUF. Buffered Mode. This bit must be programmed to "0" for the W83C554F.
MNS. Master/Slave in Buffered Mode. This bit must be programmed to "0" for the W83C554F.
AEOI. Automatic End of Interrupt. This bit should normally be programmed to "0." If
programmed to "1," Automatic End of Interrupt Mode is enabled.
UPM. Microprocessor Mode. This bit must be set to "1" to indicate the interrupt controller is
operating in an x86-based system.
Register Information
97

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