ne568a NXP Semiconductors, ne568a Datasheet - Page 2

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ne568a

Manufacturer Part Number
ne568a
Description
150mhz Phase-locked Loop
Manufacturer
NXP Semiconductors
Datasheet

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1. Signal level to assure all published parameters. Device will continue to function at lower levels with varying performance.
2. Limits are set symmetrical to f
3. Not 100% tested, but guaranteed by design.
4. Input impedance depends on package and layout capacitances. See Figures 6 and 5.
5. Linearity is tested with incremental changes in inupt frequency and measurement of the DC output voltage at Pin 14 (V
6. Free-running frequency is measured as feedthrough to Pin 14 (V
Philips Semiconductors
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
The elctrical characteristics listed below are actual tests (unless
otherwise stated) performed on each device with an automatic IC
tester prior to shipment. Performance of the device in automated
test set-up is not necessarily optimum. The NE568A is
DC ELECTRICAL CHARACTERISTICS
V
AC ELECTRICAL CHARACTERISTICS
NOTE:
1996 Feb 1
CC
SYMBOL
SYMBOL
SYMBOL
SYMBOL
150MHz phase-locked loop
then calculated from a straight line over the deviation range specified.
f
V
= 5V; T
BW
I
OSC
R
CC
f
f
CC
SYMBOL
O
O
IN
P
T
V
DMAX
STG
T
CC
JA
J
A
= 25 C; f
Supply voltage
Supply current
Maximum oscillator operating frequency
Input signal level
Demodulated bandwidth
Non-linearity
Lock range
Capture range
TC of f
Input resistance
Output impedance
Demodulated V
AM rejection
Distribution
Drift with supply
O
O
Supply voltage
Junction temperature
Storage temperature range
Maximum power dissipation
Thermal resistance
= 70MHz, Test Circuit Figure 3, f
2
6
5
PARAMETER
PARAMETER
PARAMETER
PARAMETER
2
OUT
4
O
. Actual characteristics may have asymmetry beyond the specified limits.
PARAMETER
3
IN
Dev = 20% of f
1.2k , C
= -20dBm, R
Dev = 20%, Input = -20dBm
referred to 20% deviation
Centered at 70MHz, R
V
(C
IN
TEST CONDITIONS
TEST CONDITIONS
TEST CONDITIONS
TEST CONDITIONS
2
= -20dBm (30% AM)
Input = -20dBm
Input = -20dBm
+ C
OUT
2
4.5V to 5.5V
= 16pF, R
Figure 3
STRAY
2
Pin 14
) with no input signal applied.
4
= 3.9k , unless otherwise specified.
layout-sensitive. Evaluation of performance for correlation to the
data sheet should be done with the circuit and layout of Figures 3, 4,
and 5 with the evaluation unit soldered in place. (Do not use a
socket!)
O
measured at
= 20pF)
4
= 3.9k
2
=
–20
0.40
MIN
MIN
150
4.5
-15
50
25
20
1
1
NE/SA568A
NE/SA568A
-65 to +150
RATING
LIMITS
LIMITS
+150
TYP
TYP
0.52
f
400
100
1.0
80
54
O
50
6
5
35
30
6
0
2
/7
NE/SA568A
OUT
MAX
MAX
2000
+10
+15
5.5
4.0
Product specification
70
). Non-linearity is
UNITS
mW
C/W
ppm/ C
% of f
% of f
UNITS
UNITS
UNITS
UNITS
mV
V
C
C
MHz
dBm
MHz
V
%/V
mA
k
dB
%
%
P-P
V
P-P
O
O

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