ta1360afg TOSHIBA Semiconductor CORPORATION, ta1360afg Datasheet - Page 23

• Manufacturer Part Number: ta1360afg
• Description: Ycbcr/ypbpr Signal And Sync Processor For Digital Tv, Progressive Scan Tv And Double Scan Tv
• Manufacturer: TOSHIBA Semiconductor CORPORATION

slave receiver changes to a transmitter.
I
2
C BUS Conditions
To receive data, the master transmitter changes to a receiver immediately after the first acknowledgement. The
The stop condition is always created by the master.
In this way, sub addresses are automatically incremented from the specified sub address and data are set.
Data Transmit Format 1
Data Transmit Format 2
Data Receive Format
Optional Data Transmit Format
Low level input voltage
High level input voltage
Low level output voltage at 3 mA sink current
Input current each I/O pin with an input voltage
between 0.1 VDD and 0.9 VDD
Capacitance for each I/O pin
SCL clock frequency
Hold time START condition
Low period of SCL clock
High period of SCL clock
Set-up time for a repeated START condition
Data hold time
Data set-up time
Set-up time for STOP condition
Bus free time between a STOP and START condition
S: Start condition
S
S
S
S
MSB
MSB
MSB
Slave address
Slave address
Slave address
Slave address
7 bit
7 bit
7 bit
Characteristics
A: Acknowledgement
0 A
0 A
1 A
0
A 1
MSB
MSB
MSB
･･････
Receive data
Sub address
Sub address
Sub address
8 bit
8 bit
7 bit
Sub address
A
A
A
t
t
Symbol
t
t
t
HD;STA
SU;STA
HD;DAT
SU;DAT
SU;STO
MSB
t
V
t
P
f
t
HIGH
LOW
A
V
BUF
V
SCL
OL1
C
Transmit data 1
23
I
IH
IL
Transmit data
i
i
MSB
Transmit data 1
A
9 bit
Transmit data n
8 bit
Min
−10
350
250
1.8
4.0
4.7
4.0
4.7
4.0
4.7
⎯
0
0
0
P: Stop condition
A P
A
Typ.
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
････
･･････
A P
Max
Vcc
100
MSB
1.0
0.4
10
10
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Transmit data n
8 bit
Unit
kHz
µA
pF
µs
µs
µs
µs
ns
ns
µs
µs
V
V
V
TA1360AFG
A P
2005-08-18