h55s1g32mfp-60 Hynix Semiconductor, h55s1g32mfp-60 Datasheet - Page 51
h55s1g32mfp-60
Manufacturer Part Number
h55s1g32mfp-60
Description
32mx32bit Mobile Sdram
Manufacturer
Hynix Semiconductor
Datasheet
1.H55S1G32MFP-60.pdf
(53 pages)
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Part Number:
h55s1g32mfp-60M
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HYNIX
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Special Operation for Low Power Consumption
Deep Power Down Mode
Deep Power Down Mode is an operating mode to achieve maximum power reduction by cutting the power of the whole
memory array of the devices.
Data will not be retained once the device enters Deep Power Down Mode.
Full initialization is required when the device exits from Deep Power Down Mode.
Truth Table
Deep Power Down Mode Entry
The Deep Power Down Mode is entered by having CS and WE held low with RAS and CAS high at the rising edge of
the clock, while CKE is low. The following diagram illustrates deep power down mode entry.
Rev 1.2 / Jun. 2008
Deep Power Down
Current State
CKE
CS
RAS
CAS
WE
Idle
Deep Power Down Entry
Deep Power Down Exit
Command
Pre-charge
if needed
CKE
H
L
n-1
tRP
CKE
1Gbit (32Mx32bit) Mobile SDR Memory
H
L
n
CS
X
L
Deep Power
Down Entry
H55S1G(2/3)2MFP Series
RAS
H
X
CAS
H
X
WE
X
L
11
51
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