cx29610 Mindspeed Technologies, cx29610 Datasheet - Page 174

• Manufacturer Part Number: cx29610
• Description: Optiphytm - M622 Sts-12/4x Sts-3 Sonet/sdh Multiplexer
• Manufacturer: Mindspeed Technologies

4.0 Registers
4.1 Memory Map
TXPTH (Transmit Path Overhead Control Register)
The TXPTH register controls the transmission of various octets in the Path Overhead of the SONET frame.
4-66
Bit
7
6
5
4
3
2
1
0
Default
0
0
1
0
0
0
1
1
hex address:
AutoRDI-P
AutoREI-P
TxRDI[5]
TxRDI[6]
TxRDI[7]
InsAIS-P
Mindspeed Technologies
EnPthTr
Name
DisB3
Path 1
Path 2
Path 3
Path 4
When written to 0, the J1 byte contains 00h. When written to 1, the
Path Trace Message from the TXPTHBUF circular buffer is inserted
in the J1 byte.
When written to 0, the B3 byte contains the results of the path BIP
calculation. When written to 1, the B3 byte contains 00h.
When written to 1, path REI codes are automatically inserted in the
G1 byte upon reception of B3 errors. When written to 0, automatic
insertion is disabled.
When written to 0, Path AIS is not generated. When written to 1,
Path AIS alarm is generated.
This bit is mapped to Transmit RDI bit 5 in the G1 byte.
This bit is mapped to Transmit RDI bit 6 in the G1 byte.
This bit is mapped to Transmit RDI bit 7 in the G1 byte.
When written to 1, path RDI is automatically generated for at least
20 frames upon reception of LOS, LOF, LOP, AIS-L, AIS-P, UNEQ-P,
or PLM-P. When written to 0, path RDI is inserted from bits 3–1 of
this register.
Port 1
0x081
0x0C1
0x101
0x141
Port 2
0x281
0x2C1
0x301
0x341
™
Description
Port 3
0x481
0x4C1
0x501
0x541
Port 4
0x6C1
0x681
0x701
0x741
CX29610 Data Sheet
29610-DSH-001-C
CX29610