A43L1632V-6 AMICC [AMIC Technology], A43L1632V-6 Datasheet - Page 12

• Manufacturer Part Number: A43L1632V-6
• Description: 512K X 32 Bit X 4 Banks Synchronous DRAM
• Manufacturer: AMICC [AMIC Technology]

Mode Register Filed Table to Program Modes
Register Programmed with MRS
Note : 1. RFU(Reserved for Future Use) should stay “0” during MRS cycle.
PRELIMINARY
A9
A8
0
1
Address
0
0
1
1
Function
2. If A9 is high during MRS cycle, “Burst Read Single Bit Write” function will be enabled.
3. BS0,BS1 must be 0,0 to select the Mode Register (vs. the Extended Mode Register).
A7
Write Burst Length
0
1
0
1
Test Mode
Mode Register Set
BS1
Single Bit
0
Length
Burst
(Note 3)
(December, 2004, Version 0.0)
Vendor
Type
Only
Use
BS0
0
(Note 2)
RFU
A10
A6
0
0
0
0
1
1
1
1
A5
0
1
1
0
1
1
0
0
CAS Latency
(Note 1)
W.B.L
A9
A4
0
1
0
1
0
1
0
1
Reserved
Reserved
Reserved
Reserved
Reserved
Latency
A8
1
2
3
TM
11
A7
A3
0
1
Burst Type
A6
Sequential
Interleave
CAS Latency
Type
A5
A2
0
0
0
0
1
1
1
1
A4
A1
0
0
1
1
0
0
1
1
AMIC Technology, Corp.
A3
BT
A0
0
1
0
1
0
1
0
1
Burst Length
Reserved
Reserved
Reserved
256(Full)
BT=0
A2
1
2
4
8
Burst Length
A43L1632
A1
Reserved
Reserved
Reserved
Reserved
BT=1
1
2
4
8
A0