A43L1632V-6 AMICC [AMIC Technology], A43L1632V-6 Datasheet - Page 30

• Manufacturer Part Number: A43L1632V-6
• Description: 512K X 32 Bit X 4 Banks Synchronous DRAM
• Manufacturer: AMICC [AMIC Technology]

PRELIMINARY
Page Write Cycle at Different Bank @Burst Length=4
CLOCK
A10/AP
ADDR
* Note:
1. To interrupt burst write by Row precharge, DQM should be asserted to mask invalid input data.
2. To interrupt burst write by Row precharge, both the write and precharge banks must be the same.
RAS
CAS
DQM
CKE
BS1
BS0
DQ
CS
WE
0
Row Active
(A-Bank)
RAa
RAa
1
(December, 2004, Version 0.0)
2
Row Active
(B-Bank)
RBb
RBb
3
(A-Bank)
DAa0 DAa1
Write
CAa
4
5
DAa2
6
DAa3
7
t
CDL
(B-Bank)
Write
DBb0
CBb
8
Row Active
(C-Bank)
DBb1
RCc
RCc
9
29
High
DBb2
10
Row Active
(D-Bank)
DBb3
RDd
RDd
11
(C-Bank)
DCc0
Write
CCc
12
DCc1
13
(D-Bank)
DDd0 DDd1
Write
CDd
14
AMIC Technology, Corp.
15
CDd2
*Note 1
16
t
RDL
17
(All Banks)
Precharge
: Don't care
A43L1632
18
*Note 2
19